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ES51918 데이터시트(PDF) 3 Page - Cyrustek corporation |
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ES51918 데이터시트(HTML) 3 Page - Cyrustek corporation |
3 / 32 page v1.08 06/04/03 3 ES51918 11,000 Counts Auto DMM Pin Description Pin No Symbol Type Description 1 V+ O Output of on-chip DC-DC converter. 2 V+ O Output of on-chip DC-DC converter. 3 CREF+ I/O Positive connection for reference capacitor. 4 CREF- I/O Negative connection for reference capacitor. 5 CINT O Integrator output. Connect to integral capacitor 6 CAZ I Auto-zero capacitor connection. 7 BUFF O Buffer output pin. Connect to integral resistor 8 RAZ O Buffer output pin in high-speed mode. Connect to high-speed integral resistor. 9 IVSH I Current measurement input for 1100µA, 110mA and 11A modes. 10 IVSL I Current measurement input for 110µA, 11mA. 11 OVX I Input high voltage for resistance measurement 12 OVH I Output connection for resistance measurement 13 OVSG I Sense low voltage for resistance measurement 14 OR1 O Reference resistor connection for 110.00Ω range 15 VR5 O Voltage measurement ÷10000 attenuator(1000.0V) 16 VR4 O Voltage measurement ÷1000 attenuator(110.00V) 17 VR3 O Voltage measurement ÷100 attenuator(11.000V) 18 VR2 O Voltage measurement ÷10 attenuator(1.1000V) 19 TEST 5 I/O Test pin 20 ACVL O DC signal low input in ACV/ACA mode. Connect to negative output of external AC to DC converter. 21 ACVH O DC signal high input in ACV/ACA mode. Connect to positive output of external AC to DC converter. 22 ADI I Negative input of internal AC to DC OP Amp. 23 ADO O Output of internal AC to DC OP Amp. 24 ADOHZ I Frequency input under voltage/current mode, offset to AGND. 25 OPO O Output of internal independent OP Amp. 26 OPIN+ I Positive input terminal of on-chip independent OP Amp. 27 OPIN- I Negative input terminal of on-chip independent OP Amp. 28 PWD I Power-down enable for on-chip independent OP Amp. 29 VRH O Output of band-gap voltage reference. Typically –1.23V 30 VR I Reference input voltage connection. Typically –100mV 31 VA+ I For ADP mode. De-integrating voltage positive input. The input should be higher than VA-. 32 VA- I For ADP mode. De-integrating voltage negative input. The input should be lower than VA+. 33 ADP I Measurement input in ADP mode. 34 SGND G Signal Ground. 35 VR1 I Measurement input. 36 VBAR I In capacitance mode, a compensation capacitor is connected. In temperature mode, it is used to control decimal point. In µA or mA modes, it is used to control the ‘µ’ or ‘m’ sign. 37 PMIN O Minimum peak hold output 38 PMAX O Maximum peak hold output. 39 R9K O Connect to a precise 9KΩ resister for capacitor measurement. 40 R1K O Connect to a precise 1KΩ resister for capacitor measurement. 41 CA- I/O Negative auto-zero capacitor connection for capacitor measurement 42 CA+ I/O Positive auto-zero capacitor connection for capacitor measurement 43 OHMC1 O Filter capacitor connection for resistance mode. |
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