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5V7855SWFR 데이터시트(PDF) 5 Page - Integrated Device Technology |
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5V7855SWFR 데이터시트(HTML) 5 Page - Integrated Device Technology |
5 / 14 page IDT5V7855-DPK REVISION A MARCH 11, 2010 5 ©2010 Integrated Device Technology, Inc. IDT5V7855 Data Sheet EEPROM PROGRAMMABLE PLL DIE FOR LVCMOS CRYSTAL OSCILLATOR The fractional multiplier is determined from the phase detector frequency and the VCO frequency using the following equations. Calculate the fractional multiplier decimal value: Calculate the fractional multiplier register binary value: MBIN = MDEC x 16384 Example 1: The crystal frequency is 27MHz and the desired output frequency is 166.66667MHz. 1. With a crystal frequency of 27MHz, the appropriate prescaler value is 1 and the associated phase detector frequency would be: 27MHz ÷ 1 = 27MHz. 2. For an output frequency of 166.6667MHz, the output divider which can be used with a VCO frequency in the proper 170MHz to 340MHz range is 1, and the resulting VCO frequency is: 166.6667MHz x 1 x 2 = 333.33MHz. 3. The fractional multiplier is calculated as the VCO frequency divided by the phase detector frequency or 333.33MHz ÷ 27MHz = 12.345679. 4. The MBIN is found by 12.345679 x 16384 = 202271.6 and is rounded to 202272. 5. Due to the rounding, the actual MDEC value will be 12.3457 and the actual output frequency will be: FOUT = 166.66699MHz (NOTE: This is an error of only 1.94ppm.) Example 2: The starting crystal frequency is 48MHz and the desired output frequency is 25MHz. 1. With a starting crystal frequency of 48MHz, the appropriate prescaler value can be either 1, 2 or 3 and the associated phase detector frequency would be either: 48MHz ÷ 1 = 484MHz, 48MHz ÷ 2 = 24MHz or, 48MHz ÷ 3 = 16MHz. 2. For an output frequency of 25MHz, the output dividers which can be used with a VCO frequency in the proper 170MHz to 340MHz range are: 4, 5, or 6, and the resulting VCO frequencies is: 200MHz, 250MHz, or 300MHz. 3. The fractional multiplier is calculated as the VCO frequency divided by the phase detector frequency. So, for the possible combinations identified, the resulting fractional multiplier could be one of nine possibilities. Table 3D. Fractional Multiplier Table 4. With the different MDEC values to choose from, how does one select the ‘best’ value? In general, selecting a fractional value which reduces the ppm error is the first selection criteria. This applies to MDEC values which have the fewest non-zero decimal places or MDEC values which have large integer values. This criteria would eliminate the MDEC = 4.16666, 5.208333, 8.33333, and 10.4166666 options. After the ppm error selection is made and if there are still other options, generally the higher VCO frequency will provide better performance. In this example, the higher VCO frequency corresponds with D = 6 and the associated P and MDEC values of 1 and 6.25, 2 and 12.5, or 3 and 18.75. Lastly, the higher phase detector frequency generally provides better performance. So for this example, the condition of P = 1, MDEC = 6.25, and D = 6 would be the preferred choice. 5. The MBIN is found by: 6.25 x 16384 = 102400. (No rounding is necessary.) 6. Verifying the values M DEC F VCO F PHASE DET – ----------------------------------- = F OUT F XTAL x M DEC Px Dx 2 () ---------------------------27MHz x 12.3457 1x1 x 2 --------------------- = = P = 1 FPHASE_DET (48MHz) P = 2 FPHASE_DET (24MHz) P = 3 FPHASE_DET (16MHz) D = 4 FVCO = 200MHz M DEC = 4.16666 M DEC= 8.33333 M DEC = 12.5 D = 5 FVCO = 250MHz M DEC = 5.20833 M DEC= 10.41666 M DEC = 15.625 D = 6 FVCO = 300MHz M DEC = 6.5 M DEC = 12.5 M DEC= 18.75 200MHz 48MHz ----------------------- 200MHz 24MHz ----------------------- 200MHz 16MHz ----------------------- 250MHz 48MHz ----------------------- 250MHz 24MHz ----------------------- 250MHz 16MHz ----------------------- 300MHz 48MHz ----------------------- 300MHz 24MHz ----------------------- 300MHz 16MHz ----------------------- F OUT F XTAL x M DEC Px Dx 2 () ---------------------------48MHz x 12.5 2x 6 x 2 --------------------- = = |
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