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74ABT823DB 데이터시트(PDF) 8 Page - NXP Semiconductors

부품명 74ABT823DB
상세설명  9-bit D-type flip-flop with reset and enable; 3-state
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제조업체  NXP [NXP Semiconductors]
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74ABT823_3
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 23 March 2010
8 of 17
NXP Semiconductors
74ABT823
9-bit D-type flip-flop with reset and enable; 3-state
11. Waveforms
tWL
pulse width LOW
CP; see Figure 5
3.8
2.8
-
3.8
-
ns
MR; see Figure 6
5.5
4.0
-
5.5
-
ns
trec
recovery time
MR to CP; see Figure 6
2.5
0.6
-
2.5
-
ns
Table 7.
Dynamic characteristics …continued
GND = 0 V; for test circuit, see Figure 9.
Symbol Parameter
Conditions
25
°C; V
CC = 5.0 V
−40 °C to +85 °C;
VCC = 5.0 V ± 0.5 V
Unit
Min
Typ
Max
Min
Max
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Propagation delay clock input (CP) to output (Qn), clock pulse (CP) width and maximum clock (CP)
frequency
001aac445
CP input
Qn output
tPHL
tPLH
tWH
tWL
1 / fmax
VM
VOH
VI
GND
VOL
VM
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
Master reset (MR) pulse width, propagation delay master reset (MR) to output (Qn) and recovery time
master reset (MR) to clock (CP)
001aac446
MR input
CP input
Qn output
tPHL
tWL
trec
VM
VI
GND
VI
VOH
VOL
GND
VM
VM


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