74ALVC32BQ datasheet(3/13 Pages) NXP

부품명	74ALVC32BQ

상세설명	Quad 2-input OR gate

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74ALVC32_2

Product data sheet

Rev. 02 — 10 December 2007

3 of 13

NXP Semiconductors

74ALVC32

Quad 2-input OR gate

5.2 Pin description

6.

Functional description

[1]

H = HIGH voltage level

L = LOW voltage level

7.

Limiting values

[1]

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2]

When VCC = 0 V (power-down mode), the output voltage can be 3.6 V in normal operation.

[3]

For SO14 packages: above 70

°C derate linearly with 8 mW/K.

For TSSOP14 packages: above 60

°C derate linearly with 5.5 mW/K.

For DHVQFN14 packages: above 60

°C derate linearly with 4.5 mW/K.

Table 2.

Pin description

Symbol

Description

nA

1, 4, 9, 12

data input

nB

2, 5, 10, 13

data input

nY

3, 6, 8, 11

data output

VCC

14

supply voltage

GND

7

ground (0 V)

Table 3.

Function table[1]

Input nA

Input nB

Output nY

LLL

LH

H

HL

H

HHH

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

VCC

supply voltage

−0.5

+4.6

V

IIK

input clamping current

VI <0V

−50

-

mA

VI

input voltage

−0.5

+4.6

V

IOK

output clamping current

VO >VCC or VO <0V

-

±50

mA

VO

output voltage

output HIGH or LOW state

[1] [2]

−0.5

VCC + 0.5

V

output 3-state

−0.5

+4.6

V

power-down mode, VCC = 0 V

[2]

−0.5

+4.6

V

IO

output current

VO = 0 V to VCC

-

±50

mA

ICC

supply current

-

100

mA

IGND

ground current

−100

-

mA

Tstg

storage temperature

−65

+150

°C

Ptot

total power dissipation

Tamb = −40 °C to +85 °C

[3]

-

500

mW

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