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74AUP2G86GT 데이터시트(PDF) 3 Page - NXP Semiconductors

부품명 74AUP2G86GT
상세설명  Low-power dual 2-input EXCLUSIVE-OR gate
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

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74AUP2G86_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 29 June 2009
3 of 17
NXP Semiconductors
74AUP2G86
Low-power dual 2-input EXCLUSIVE-OR gate
6.
Pinning information
6.1 Pinning
6.2 Pin description
Fig 4.
Pin configuration SOT765-1 (VSSOP8)
Fig 5.
Pin configuration SOT833-1 (XSON8)
74AUP2G86
1A
VCC
1B
1Y
2Y
2B
GND
2A
001aaf173
1
2
3
4
6
5
8
7
74AUP2G86
2B
1Y
VCC
2A
2Y
1B
1A
GND
001aaf174
36
27
18
45
Transparent top view
Fig 6.
Pin configuration SOT996-2 (XSON8U)
Fig 7.
Pin configuration SOT902-1 (XQFN8U)
001aaj918
74AUP2G86
Transparent top view
8
7
6
5
1
2
3
4
1A
1B
2Y
GND
VCC
1Y
2B
2A
001aaf175
1B
2B
1A
2Y
1Y
2A
Transparent top view
3
6
1
5
7
2
terminal 1
index area
74AUP2G86
Table 3.
Pin description
Symbol
Pin
Description
SOT765-1, SOT833-1 and SOT996-2
SOT902-1
1A, 2A
1, 5
7, 3
data input
1B, 2B
2, 6
6, 2
data input
GND
4
4
ground (0 V)
1Y, 2Y
7, 3
1, 5
data output
VCC
8
8
supply voltage


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