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74AUP2T1326GF 데이터시트(PDF) 11 Page - NXP Semiconductors |
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74AUP2T1326GF 데이터시트(HTML) 11 Page - NXP Semiconductors |
11 / 16 page 74AUP2T1326_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 1 July 2009 11 of 16 NXP Semiconductors 74AUP2T1326 Low-power dual supply buffer/line driver; 3-state 13. Transfer characteristics 14. Waveforms transfer characteristics Table 11. Transfer characteristics Voltages are referenced to GND (ground=0V; for test circuit see Figure 5. Symbol Parameter Conditions 25 °C −40 °C to +85 °C Unit Min Typ Max Min Max VT+ positive-going threshold voltage nOE inputs; see Figure 6 and Figure 7 VCC(A) = 1.65 V 0.91 - 1.29 0.91 1.29 V VCC(A) = 2.3 V 1.37 - 1.77 1.37 1.77 V VT− negative-going threshold voltage nOE inputs; see Figure 6 and Figure 7 VCC(A) = 1.65 V 0.47 - 0.84 0.47 0.84 V VCC(A) = 2.3 V 0.69 - 1.04 0.69 1.04 V VH hysteresis voltage nOE inputs; (VT+ − VT−); see Figure 6, Figure 7 and Figure 8 VCC(A) = 1.65 V 0.27 - 0.66 0.27 0.66 V VCC(A) = 2.3 V 0.53 - 0.92 0.53 0.92 V VT+ and VT− limits at 70 % and 20 %. Fig 6. Transfer characteristic Fig 7. Definition of VT+, VT− and VH mna207 VO VI VH VT+ VT− mna208 VO VI VH VT+ VT− |
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