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74HC423D 데이터시트(PDF) 1 Page - NXP Semiconductors

부품명 74HC423D
상세설명  Dual retriggerable monostable multivibrator with reset
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제조업체  NXP [NXP Semiconductors]
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1.
General description
74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with
low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two
methods of output pulse width control.
1. The minimum pulse width is essentially determined by the selection of an external
resistor (REXT) and capacitor (CEXT), see Section 12.1.
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQ output
HIGH and also inhibits the triggering. Figure 10 and Figure 11 illustrate pulse control
by reset.
The nA and nB inputs’ Schmitt trigger action makes them highly tolerant to slower input
rise and fall times.
The 74HC423; 74HCT423 are identical to the 74HC123; 74HCT123 except that they
cannot be triggered via the reset input.
2.
Features
I DC triggered from active HIGH or active LOW inputs
I Retriggerable for very long pulses up to 100% duty factor
I Direct reset terminates output pulse
I Schmitt-trigger action on all inputs except for the reset input
I Complies with JEDEC standard no. 7A
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Specified from −40 °Cto+85 °C and from −40 °C to +125 °C
74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Rev. 03 — 24 July 2008
Product data sheet


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