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74LVC2G53 데이터시트(PDF) 4 Page - NXP Semiconductors |
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74LVC2G53 데이터시트(HTML) 4 Page - NXP Semiconductors |
4 / 23 page 74LVC2G53_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 18 June 2008 4 of 23 NXP Semiconductors 74LVC2G53 2-channel analog multiplexer/demultiplexer 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Fig 5. Pin configuration SOT996-2 (XSON8U) Fig 6. Pin configuration SOT902-1 (XQFN8U) 001aai274 74LVC2G53 Transparent top view 8 7 6 5 1 2 3 4 Z E GND GND VCC Y0 Y1 S 001aag724 E Y1 Z GND Y0 S Transparent top view 3 6 1 5 7 2 terminal 1 index area 74LVC2G53 Table 3. Pin description Symbol Pin Description SOT505-2, SOT765-1, SOT996-2 and SOT833-1 SOT902-1 Z 1 7 common output or input E 2 6 enable input (active LOW) GND 3 5 ground (0 V) GND 4 4 ground (0 V) S 5 3 select input Y1 6 2 independent input or output Y0 7 1 independent input or output VCC 8 8 supply voltage Table 4. Function table[1] Input Channel on S E L L Y0 to Z or Z to Y0 H L Y1 to Z or Z to Y1 X H Z (switch off) |
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