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74LVC3G14GM 데이터시트(PDF) 8 Page - NXP Semiconductors |
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74LVC3G14GM 데이터시트(HTML) 8 Page - NXP Semiconductors |
8 / 18 page 74LVC3G14_7 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 07 — 12 June 2008 8 of 18 NXP Semiconductors 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input 14. Waveforms transfer characteristics Table 10. Measurement points VCC Input VM Output VM 1.65 V to 1.95 V 0.5 × V CC 0.5 × V CC 2.3 V to 2.7 V 0.5 × V CC 0.5 × V CC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × V CC Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 9. Load circuitry for switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 11. Test data Supply voltage Input Load VEXT VCC VI tr =tf CL RL tPLH, tPHL 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 k Ω open 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open VT+ and VT− limits at 70 % and 20 %. Fig 10. Transfer characteristic Fig 11. Definition of VT+, VT− and VH mna207 VO VI VH VT+ VT− mna208 VO VI VH VT+ VT− |
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