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74LVC169 데이터시트(PDF) 5 Page - NXP Semiconductors

부품명 74LVC169
상세설명  Presettable synchronous 4-bit up/down binary counter
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제조업체  NXP [NXP Semiconductors]
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74LVC169_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 8 June 2009
5 of 22
NXP Semiconductors
74LVC169
Presettable synchronous 4-bit up/down binary counter
5.
Pinning information
5.1 Pinning
5.2 Pin description
(1) The die substrate is attached to this pad using
conductive die material. It can not be used as a supply
pin or input.
Fig 4.
Pin configuration SO16 and
(T)SSOP16 package
Fig 5.
Pin configuration DHVQFN16 package
74LVC169
U/D
VCC
CP
TC
D0
Q0
D1
Q1
D2
Q2
D3
Q3
CEP
CET
GND
PE
001aaa644
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aaa682
74LVC169
CEP
CET
D3
Q3
D2
GND(1)
Q2
D1
Q1
D0
Q0
CP
TC
Transparent top view
7
10
6
11
5
12
4
13
3
14
2
15
terminal 1
index area
Table 2.
Pin description
Symbol
Pin
Description
U/D
1
up/down control input
CP
2
clock input (LOW-to-HIGH, edge-triggered)
D0 to D3
3, 4, 5, 6
data input
CEP
7
count enable input (active LOW)
GND
8
ground (0 V)
PE
9
parallel enable input (active LOW)
CET
10
count enable carry input (active LOW)
Q0 to Q3
14, 13, 12, 11
flip-flop output
TC
15
terminal count output (active LOW)
VCC
16
supply voltage


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