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ADC1010S 데이터시트(PDF) 6 Page - NXP Semiconductors

부품명 ADC1010S
상세설명  Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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ADC1010S_SER_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 01 — 9 April 2010
6 of 36
NXP Semiconductors
ADC1010S series
ADC1010S series; CMOS or LVDS DDR digital outputs
9.
Static characteristics
Table 6.
Static characteristics[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supplies
VDDA
analog supply voltage
2.85
3.0
3.4
V
VDDO
output supply voltage
CMOS mode
1.65
1.8
3.6
V
LVDS DDR mode
2.85
3.0
3.6
V
IDDA
analog supply current
fclk =125 Msps; fi =70 MHz
-
210
-
mA
IDDO
output supply current
CMOS mode; fclk =125 Msps;
fi =70 MHz
-10
-
mA
LVDS DDR mode:
fclk =125 Msps; fi =70 MHz
-35
-
mA
P
power dissipation
ADC1010S125;
analog supply only
-630
-
mW
ADC1010S105;
analog supply only
-550
-
mW
ADC1010S080;
analog supply only
-430
-
mW
ADC1010S065;
analog supply only
-380
-
mW
power-down mode
-
2
-
mW
sleep mode
-
40
-
mW
Clock inputs: pins CLKP and CLKM
LVPECL
Vi(clk)dif
differential clock input voltage
peak-to-peak
-
±1.6
-
V
LVDS
Vi(clk)dif
differential clock input voltage
peak-to-peak
-
±0.70
-
V
SINE wave
Vi(clk)dif
differential clock input voltage
peak-to-peak
±0.8
±3.0
-
V
LVCMOS
VIL
LOW-level input voltage
-
-
0.3VDDA V
VIH
HIG-level input voltage
0.7VDDA
--
V
Logic inputs: pins PWD and OE
VIL
LOW-level input voltage
0
-
0.8
V
VIH
HIGH-level input voltage
2
-
VDDA
V
IIL
LOW-level input current
<tbd>
-
<tbd>
μA
IIH
HIGH-level input current
−10
-
+10
μA
Serial peripheral interface: pins CS, SDIO/ODS, SCLK/DFS
VIL
LOW-level input voltage
0
-
0.3VDDA V
VIH
HIGH-level input voltage
0.7VDDA
-VDDA
V
IIL
LOW-level input current
−10
-
+10
μA
IIH
HIGH-level input current
−50
-
+50
μA
CI
input capacitance
-
4
-
pF


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