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LM3S6950-EQR100-A2 데이터시트(PDF) 9 Page - Texas Instruments

부품명 LM3S6950-EQR100-A2
상세설명  Stellaris LM3S6950 Microcontroller
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

LM3S6950-EQR100-A2 데이터시트(HTML) 9 Page - Texas Instruments

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List of Figures
Figure 1-1.
Stellaris
® LM3S6950 Microcontroller High-Level Block Diagram ............................. 37
Figure 2-1.
CPU Block Diagram ............................................................................................. 46
Figure 2-2.
TPIU Block Diagram ............................................................................................ 47
Figure 5-1.
JTAG Module Block Diagram ................................................................................ 57
Figure 5-2.
Test Access Port State Machine ........................................................................... 60
Figure 5-3.
IDCODE Register Format ..................................................................................... 66
Figure 5-4.
BYPASS Register Format .................................................................................... 66
Figure 5-5.
Boundary Scan Register Format ........................................................................... 67
Figure 6-1.
Basic RST Configuration ...................................................................................... 69
Figure 6-2.
External Circuitry to Extend Power-On Reset ........................................................ 70
Figure 6-3.
Reset Circuit Controlled by Switch ........................................................................ 70
Figure 6-4.
Power Architecture .............................................................................................. 72
Figure 6-5.
Main Clock Tree .................................................................................................. 74
Figure 7-1.
Hibernation Module Block Diagram ..................................................................... 134
Figure 7-2.
Clock Source Using Crystal ................................................................................ 135
Figure 7-3.
Clock Source Using Dedicated Oscillator ............................................................. 136
Figure 8-1.
Flash Block Diagram .......................................................................................... 153
Figure 9-1.
GPIO Port Block Diagram ................................................................................... 180
Figure 9-2.
GPIODATA Write Example ................................................................................. 181
Figure 9-3.
GPIODATA Read Example ................................................................................. 181
Figure 10-1.
GPTM Module Block Diagram ............................................................................ 221
Figure 10-2.
16-Bit Input Edge Count Mode Example .............................................................. 225
Figure 10-3.
16-Bit Input Edge Time Mode Example ............................................................... 226
Figure 10-4.
16-Bit PWM Mode Example ................................................................................ 227
Figure 11-1.
WDT Module Block Diagram .............................................................................. 257
Figure 12-1.
UART Module Block Diagram ............................................................................. 281
Figure 12-2.
UART Character Frame ..................................................................................... 282
Figure 12-3.
IrDA Data Modulation ......................................................................................... 284
Figure 13-1.
SSI Module Block Diagram ................................................................................. 321
Figure 13-2.
TI Synchronous Serial Frame Format (Single Transfer) ........................................ 324
Figure 13-3.
TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 324
Figure 13-4.
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 325
Figure 13-5.
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 325
Figure 13-6.
Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 326
Figure 13-7.
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 327
Figure 13-8.
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 ........ 327
Figure 13-9.
Freescale SPI Frame Format with SPO=1 and SPH=1 ......................................... 328
Figure 13-10. MICROWIRE Frame Format (Single Frame) ........................................................ 329
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ............................................. 330
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ............ 330
Figure 14-1.
I2C Block Diagram ............................................................................................. 359
Figure 14-2.
I2C Bus Configuration ........................................................................................ 359
Figure 14-3.
START and STOP Conditions ............................................................................. 360
Figure 14-4.
Complete Data Transfer with a 7-Bit Address ....................................................... 360
Figure 14-5.
R/S Bit in First Byte ............................................................................................ 360
9
April 04, 2010
Texas Instruments-Production Data
Stellaris® LM3S6950 Microcontroller


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