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DAC1003D160 데이터시트(HTML) 6 Page - NXP Semiconductors

부품명 DAC1003D160
상세내용  Dual 10 bits DAC, up to 160 MHz, 2 x interpolation
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제조사  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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DAC1003D160 데이터시트(HTML) 6 Page - NXP Semiconductors

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DAC1003D160_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 August 2008
6 of 19
NXP Semiconductors
DAC1003D160
Dual 10 bits DAC, up to 160 MHz, 2 x interpolation
7.
Functional description
The DAC1003D160 is a segmented architecture composed of a 7-bit thermometer
sub-DAC and the remaining 3-bit in a binary weighted sub-DAC.
The device produces two complementary current outputs on both channels, respectively
pins IOUT/IOUTN and QOUT/QOUTN which need to be connected via a load resistor to
the ground.
Figure 3 shows the equivalent analog output circuit of one DAC, which consists of a
parallel combination of PMOS current sources and associated switches for each segment.
The cascade source configuration enables the increase of the output impedance of the
source and the improvement of the dynamic performance of the DAC by introducing less
distortion.
Figure 4 shows the internal reference configuration. In this case the bias current is given
by the output of the internal regulator connected to the inverting input of the internal
operational amplifiers, while external resistors RI and RQ are connected respectively to
pins IVIRES and QVIRES. Thus the output current of the two DACs is typically fixed to
20 mA with an appropriate choice of these resistors. This configuration is optimal for
temperature drift compensation because the band gap can be matched with the voltage
on the feedback resistors.
The relation between full-scale output current IO(fs) and the RI (RQ) is:
The output current can also be adjusted by imposing an external reference voltage to the
inverting input pin GAPOUT and disabling the internal band gap with pin GAPD set to
HIGH. At a voltage lower than 1.2 V the current can be set at values lower than 20 mA.
The input references at pins IVIRES and QVIRES may also be driven by separate
reference voltages to adjust independently the two DAC currents.
R
I
2048
V
GAPOUT
×
82
I
OFS
()
×
------------------------------------------
=
Fig 3.
Equivalent analog output circuit
Fig 4.
Internal reference configuration
014aaa537
AGND
RL
RL
AGND
IOUT/QOUT
IOUTN/QOUTN
DAC1003D160
014aaa538
QVIRES
IVIRES
GAPOUT
AGND
GAPD
INTERNAL
BAND GAP
I DAC current
sources array
DAC1003D160
Q DAC current
sources array
RI
RQ


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