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TDA18271HD_09 데이터시트(Datasheet) 56 Page - NXP Semiconductors

부품명 TDA18271HD_09
상세내용  Silicon Tuner IC
PDF  70 Pages
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제조사  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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TDA18271HD_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 19 May 2009
56 of 70
NXP Semiconductors
TDA18271HD
Silicon Tuner IC
[1]
ESD protection components are not shown.
11. Limiting values
[1]
The TDA18271HD withstands the latch-up specifications of JEDEC JESD78A, with the specific
recommendation using coupling capacitors on pins RF_IN, LT, STO, XTOUTP and XTOUTN.
12. Thermal characteristics
[1]
The junction temperature can be obtained with the formula Tj =Tamb +Rth(j-a) × VCC × ICC, where Rth(j-a) is
the thermal resistance of the application. Rth(j-a) must be such that the resulting Tj does not exceed the
maximum value defined in Table 56.
V_IFAGC
47
high-Z
VSYNC
51
high-Z
CAPREGFILTRF
52
2.8 V (Normal mode); 0 V (Sleep mode)
Table 55.
Internal circuits …continued
Symbol
Pin
Description[1]
Average DC voltage
001aaf862
47
001aaf863
51
001aaf864
52
Table 56.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
−0.3
+3.6
V
VI
input voltage
pins SDA and SCL
−0.3
+5.5
V
all other pins
VCC < 3.3 V
−0.3
VCC + 0.3 V
VCC > 3.3 V
−0.3
+3.6
V
Tstg
storage temperature
−40
+150
°C
Tj
junction temperature
-
110
°C
Vesd
electrostatic
discharge voltage
HBM: EIA/JESD22-A114
±2000
-
V
MM: EIA/JESD22-A115
±200
-
V
Table 57.
Thermal characteristics[1]
Symbol
Parameter
Conditions
Typ
Unit
Rth(j-c)
thermal resistance from junction
to case
according to JEDEC
specification
19.6
K/W




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