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TL1963AKTTRG3 데이터시트(HTML) 3 Page - Texas Instruments

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부품명 TL1963AKTTRG3
상세내용  1.5-A LOW-NOISE FAST-TRANSIENT-RESPONSE LOW-DROPOUT REGULATOR
Download  27 Pages
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제조사  TI [Texas Instruments]
홈페이지  http://www.ti.com
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TL1963AKTTRG3 데이터시트(HTML) 3 Page - Texas Instruments

 
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TL1963A-xx
www.ti.com........................................................................................................................................................ SLVS719E – JUNE 2008 – REVISED AUGUST 2009
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
IN
–20 V to 20 V
OUT
–20 V to 20 V
Input-to-output differential(2)
–20 V to 20 V
VIN
Input voltage range
SENSE
–20 V to 20 V
ADJ
–7 V to 7 V
SHDN
–20 V to 20 V
tshort
Output short-circuit duration
Indefinite
Tlead
Maximum lead temperature
10-second soldering time
300°C
TJ
Operating virtual-junction temperature range
–40°C to 125°C
Tstg
Storage temperature range
–65°C to 150°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Absolute maximum input-to-output differential voltage cannot be achieved with all combinations of rated IN pin and OUT pin voltages.
With the IN pin at 20 V, the OUT pin may not be pulled below 0 V. The total measured voltage from IN to OUT cannot exceed ±20 V.
PACKAGE THERMAL DATA
(1)
PACKAGE
BOARD
θJA
θJC
θJP
(2)
SOT-223 (DCY)
High K, JESD 51-5
48.3°C/W
30.6°C/W
TO-223 (DCQ)
High K, JESD 51-5
53°C/W
15°C/W
TO-263 (KTT)
High K, JESD 51-5
26.5°C/W
24.1°C/W
0.38°C/W
(1)
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(2)
For packages with exposed thermal pads, such as QFN, PowerPAD™, and PowerFLEX™,
θJP is defined as the thermal resistance
between the die junction and the bottom of the exposed pad.
Copyright © 2008–2009, Texas Instruments Incorporated
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