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74HC132DR2G 데이터시트(PDF) 3 Page - ON Semiconductor

부품명 74HC132DR2G
상세설명  Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS
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제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

74HC132DR2G 데이터시트(HTML) 3 Page - ON Semiconductor

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74HC132
http://onsemi.com
3
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
Positive DC Supply Voltage
*0.5 to )7.0
V
VIN
Digital Input Voltage
*0.5 to )7.0
V
VOUT
DC Output Voltage
Output in 3−State
High or Low State
*0.5 to )7.0
*0.5 to VCC )0.5
V
IIK
Input Diode Current
*20
mA
IOK
Output Diode Current
$20
mA
IOUT
DC Output Current, per Pin
$25
mA
ICC
DC Supply Current, VCC and GND Pins
$75
mA
IGND
DC Ground Current per Ground Pin
$75
mA
TSTG
Storage Temperature Range
*65 to )150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
_C
TJ
Junction Temperature Under Bias
)150
_C
qJA
Thermal Resistance
14−SOIC
14−TSSOP
125
170
_C/W
PD
Power Dissipation in Still Air at 85_C
SOIC
TSSOP
500
450
mW
MSL
Moisture Sensitivity
Level 1
FR
Flammability Rating
Oxygen Index: 30% − 35%
UL 94 V−0 @ 0.125 in
VESD
ESD Withstand Voltage
Human Body Model (Note 1)
Machine Model (Note 2)
u2000
u200
V
ILatchup
Latchup Performance
Above VCC and Below GND at 85_C (Note 3)
$300
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to EIA/JESD78.
4. For high frequency or heavy load considerations, see Chapter 2the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
VIN, VOUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
*55
)125
_C
tr, tf
Input Rise and Fall Time (Figure 3)
No Limit
(Note 5)
ns
5. When VIN X 0.5 VCC, ICC >> quiescent current.
6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.


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