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3 / 11 page Obsolete Product(s) - Obsolete Product(s) STG3684 3/11 Table 6: DC Specifications Note 1: Guaranteed by design Note 2: ∆RON = RON(MAX) - RON(MIN). Note 3: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Symbol Parameter Test Conditions Value Unit VCC (V) TA = 25°C -40 to 85°C -55 to 125°C Min. Typ. Max. Min. Max. Min. Max. VIH High Level Input Voltage 1.65-1.95 0.65VCC 0.65VCC 0.65VCC V 2.3-2.5 1.4 1.4 1.4 2.7-3.0 1.4 1.4 1.4 3.3 1.5 1.5 1.5 3.6 1.7 1.7 1.7 4.3 2.2 2.2 2.2 VIL Low Level Input Voltage 1.65-1.95 0.40 0.40 0.40 V 2.3-2.5 0.50 0.50 0.50 2.7-3.6 0.50 0.50 0.50 3.3 0.50 0.50 0.50 3.6 0.50 0.50 0.50 4.3 1.3 1.3 1.3 RON Switch ON Resistance (1) 4.3 VS=0V to VCC IS=100mA 0.40 0.50 0.50 Ω 3.0 0.40 0.50 0.60 2.7 0.40 0.50 0.60 2.3 0.50 0.80 0.80 1.8 0.70 3.0 4.0 1.65 0.80 3.0 4.0 ∆RON ON Resistance Match between channels (1,2) 2.7 VS=1.5V IS=100mA 0.06 Ω RFLAT ON Resistance FLATNESS (3) 4.3 VS=1.5V IS=100mA Ω 3.0 2.7 0.07 0.15 0.15 2.3 1.65 VS=0.8V IS=100mA IOFF OFF State Leakage Current (nSn), (Dn) 4.3 VS=0.3 or 4V ±10 ± 100 nA IIN Input Leakage Current 0 - 4.3 VIN= 0 to 4.3V ±0.1 ± 1 µA ICC Quiescent Supply Current (1) 1.65-4.3 VIN=VCC or GND ±0.05 ±0.2 ±1 µA |
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