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SN74VMEH22501DGG 데이터시트(PDF) 7 Page - Texas Instruments

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부품명 SN74VMEH22501DGG
상세설명  8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

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SN74VMEH22501
www.ti.com
SCES357F – JULY 2001 – REVISED FEBRUARY 2010
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC,
Supply voltage range
–0.5
4.6
V
BIAS VCC
VI
Input voltage range(2)
–0.5
7
V
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
–0.5
7
V
3A port or Y output
–0.5
VCC + 0.5
Voltage range applied to any output in the high or low
VO
V
state(2)
B port
–0.5
4.6
3A port or Y output
50
IO
Output current in the low state
mA
B port
100
3A port or Y output
–50
IO
Output current in the high state
mA
B port
–100
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0 or VO > VCC, B port
–50
mA
DGG package
70
qJA
Package thermal impedance(3)
DGV package
58
°C/W
GQL/ZQL package
42
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
(1) (2)
MIN
NOM
MAX
UNIT
VCC,
Supply voltage
3.15
3.3
3.45
V
BIAS VCC
Control inputs or A port
VCC
5.5
VI
Input voltage
V
B port
VCC
5.5
Control inputs or A port
2
VIH
High-level input voltage
V
B port
0.5 VCC + 50 mV
Control inputs or A port
0.8
VIL
Low-level input voltage
V
B port
0.5 VCC – 50 mV
IIK
Input clamp current
–18
mA
3A port and Y output
–12
IOH
High-level output current
mA
B port
–48
3A port and Y output
12
IOL
Low-level output current
mA
B port
64
Δt/Δv
Input transition rise or fall rate
Outputs enabled
10
ns/V
Δt/ΔVCC
Power-up ramp rate
20
ms/V
TA
Operating free-air temperature
0
85
°C
(1)
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(2)
Proper connection sequence for use of the B-port I/O precharge feature is GND and BIAS VCC = 3.3 V first, I/O second, and VCC = 3.3 V
last, because the BIAS VCC precharge circuitry is disabled when any VCC pin is connected. The control inputs can be connected at any
time, but normally are connected during the I/O stage. If B-port precharge is not required, any connection sequence is acceptable, but
generally, GND is connected first.
Copyright © 2001–2010, Texas Instruments Incorporated
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