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LM3S8730-EQN50-A2T 데이터시트(PDF) 46 Page - Texas Instruments |
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LM3S8730-EQN50-A2T 데이터시트(HTML) 46 Page - Texas Instruments |
46 / 551 page 3 Memory Map The memory map for the LM3S8730 controller is provided in Table 3-1 on page 46. In this manual, register addresses are given as a hexadecimal increment, relative to the module’s base address as shown in the memory map. See also Chapter 4, “Memory Map” in the ARM® Cortex™-M3 Technical Reference Manual. Table 3-1. Memory Map a For details on registers, see page ... Description End Start Memory 149 On-chip flash b 0x0001.FFFF 0x0000.0000 - Reserved 0x1FFF.FFFF 0x0002.0000 149 Bit-banded on-chip SRAM c 0x2000.FFFF 0x2000.0000 - Reserved 0x21FF.FFFF 0x2001.0000 145 Bit-band alias of 0x2000.0000 through 0x200F.FFFF 0x221F.FFFF 0x2200.0000 - Reserved 0x3FFF.FFFF 0x2220.0000 FiRM Peripherals 250 Watchdog timer 0x4000.0FFF 0x4000.0000 - Reserved 0x4000.3FFF 0x4000.1000 176 GPIO Port A 0x4000.4FFF 0x4000.4000 176 GPIO Port B 0x4000.5FFF 0x4000.5000 176 GPIO Port C 0x4000.6FFF 0x4000.6000 176 GPIO Port D 0x4000.7FFF 0x4000.7000 323 SSI0 0x4000.8FFF 0x4000.8000 - Reserved 0x4000.BFFF 0x4000.9000 278 UART0 0x4000.CFFF 0x4000.C000 278 UART1 0x4000.DFFF 0x4000.D000 - Reserved 0x4001.FFFF 0x4000.E000 Peripherals 363 I2C Master 0 0x4002.07FF 0x4002.0000 376 I2C Slave 0 0x4002.0FFF 0x4002.0800 - Reserved 0x4002.3FFF 0x4002.1000 176 GPIO Port E 0x4002.4FFF 0x4002.4000 176 GPIO Port F 0x4002.5FFF 0x4002.5000 176 GPIO Port G 0x4002.6FFF 0x4002.6000 - Reserved 0x4002.FFFF 0x4002.7000 222 Timer0 0x4003.0FFF 0x4003.0000 222 Timer1 0x4003.1FFF 0x4003.1000 222 Timer2 0x4003.2FFF 0x4003.2000 222 Timer3 0x4003.3FFF 0x4003.3000 - Reserved 0x4003.FFFF 0x4003.4000 404 CAN0 Controller 0x4004.0FFF 0x4004.0000 June 22, 2010 46 Texas Instruments-Production Data Memory Map |
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