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LM3S8730-EQC50-A2 데이터시트(PDF) 99 Page - Texas Instruments |
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LM3S8730-EQC50-A2 데이터시트(HTML) 99 Page - Texas Instruments |
99 / 551 page Register 16: Device Capabilities 3 (DC3), offset 0x018 This register provides a list of features available in the system. The Stellaris family uses this register format to indicate the availability of the following family features in the specific device: Analog Comparator I/Os, CCP I/Os, ADC I/Os, and PWM I/Os. Device Capabilities 3 (DC3) Base 0x400F.E000 Offset 0x018 Type RO, reset 0x8300.0000 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 reserved CCP0 CCP1 reserved 32KHZ RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO Type 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 Reset 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 reserved RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO Type 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Reset Description Reset Type Name Bit/Field 32KHz Input Clock Available When set, indicates an even CCP pin is present and can be used as a 32-KHz input clock. 1 RO 32KHZ 31 Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. 0 RO reserved 30:26 CCP1 Pin Present When set, indicates that Capture/Compare/PWM pin 1 is present. 1 RO CCP1 25 CCP0 Pin Present When set, indicates that Capture/Compare/PWM pin 0 is present. 1 RO CCP0 24 Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. 0 RO reserved 23:0 99 June 22, 2010 Texas Instruments-Production Data Stellaris® LM3S8730 Microcontroller |
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