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SN74AUP1G97DCKRG4 데이터시트(PDF) 10 Page - Texas Instruments

부품명 SN74AUP1G97DCKRG4
상세설명  LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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SN74AUP1G97DCKRG4 데이터시트(HTML) 10 Page - Texas Instruments

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VM
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
1 M
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Output
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. tPLH and tPHL are the same as tpd.
E. All parameters and waveforms are not applicable to all devices.
VM
VM
VM
VM
VM
5, 10, 15, 30 pF
VCC/2
VCC
VCC = 1.2 V
± 0.1 V
VCC = 0.8 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
CL
VM
VI
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
th
tsu
Data Input
Timing Input
VCC
0 V
VCC
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC/2
VCC/2
VCC/2
VCC/2
VCC
VCC/2
SN74AUP1G97
SCES505J – NOVEMBER 2003 – REVISED MAY 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Duration)
Figure 10. Load Circuit and Voltage Waveforms
10
Submit Documentation Feedback
Copyright © 2003–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP1G97


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