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ISL54226IRUZ-T7A 데이터시트(PDF) 11 Page - Intersil Corporation |
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ISL54226IRUZ-T7A 데이터시트(HTML) 11 Page - Intersil Corporation |
11 / 18 page ISL54226 11 FN7614.0 July 29, 2010 ISL54226 Operation The following will discuss using the ISL54226 shown in the “Application Block Diagram” on page 8. Power The power supply connected at the VDD pin provides the DC bias voltage required by the ISL54226 part for proper operation. The ISL54226 can be operated with a VDD voltage in the range of 2.7V to 5.25V. For lowest power consumption you should use the lowest VDD supply. A 0.01µF or 0.1µF decoupling capacitor should be connected from the VDD pin to ground to filter out any power supply noise from entering the part. The capacitor should be located as close to the VDD pin as possible. In a typical application, VDD will be in the range of 2.8V to 4.3V and will be connected to the battery or LDO of the portable media device. Logic Control The state of the ISL54226 device is determined by the voltage at the OE/ALM pin and the signal voltage at the COM pins. Refer to “Truth Table” on page 2. The OE/ALM pin is internally pulled low through 4MΩ resistors to ground and can be tri-stated by a µProcessor. The OE/ALM pin is an open drain connection. It should be pulled high through an external 100kΩ pull-up resistor. The OE/ALM pin can then be driven “Low” by a µProcessor to open all switches or it can be monitored by the µProcessor for a “Low” when the part goes into an overvoltage condition. The ISL54226 is designed to minimize IDD current consumption when the logic control voltage is lower than the VDD supply voltage. With VDD = 3.6V and the OE/ALM logic pin is at 1.4V the part typically draws only 25µA. With VDD = 4.3V and the OE/ALM logic pin is at 2.6V the part typically draws only 35µA. Driving the logic pin to the VDD supply rail minimizes power consumption. The OE/ALM pin can be driven with a voltage higher than the VDD supply voltage. It can be driven up to 5.25V with a VDD supply in the range of 2.7V to 5.25V. Normal Operation Mode With a signal level in the range of 0V to 3.6V the switches will be ON when the OE/ALM pin = Logic “1” and will be OFF (high impedance) when the OE/ALM pin = Logic “0”. USB 2.0 VBUS Short Requirements The USB specification in section 7.1.1 states a USB device must be able to withstand a VBUS short (4.4V to 5.25V) or a -1V short to the D+ or D- signal lines when the device is either powered off or powered on for at least 24 hours. The ISL54226 part has special power-off protection and OVP detection circuitry to meet these short circuit requirements. This circuitry allows the ISL54226 to provide protection to the USB down-stream transceiver connected at its signal pins (D-, D+) to meet the USB specification short circuit requirements. The power-off protection and OVP circuitry allows the COM pins (COM-, COM+) to be driven up to 5.25V or down to -5V while the VDD supply voltage is in the range of 0V to 5.25V. In these overvoltage conditions with a 500Ω external VDD resistor the part draws <55µA of current into the COM pins and causes no stress/damage to the IC. In addition all switches are OFF and the shorted VBUS voltage will be isolated from getting through to the other side of the switch channels, thereby protecting the USB transceiver. TABLE 2. LOGIC CONTROL VOLTAGE LEVELS VDD SUPPLY RANGE LOGIC = “0” (LOW) LOGIC = “1” (HIGH) OE/ALM OE/ALM 2.7V to 3.6V ≤0.5V or floating ≥1.4V 3.7V to 4.2V ≤0.7V or floating ≥1.7V 4.3V to 5.25V ≤0.8V or floating ≥2.0V |
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