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FAN5354MPX 데이터시트(PDF) 2 Page - Fairchild Semiconductor |
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FAN5354MPX 데이터시트(HTML) 2 Page - Fairchild Semiconductor |
2 / 14 page © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5354 • Rev. 1.0.4 2 Table 1. Recommended External Components for 3A Maximum Load Current Component Description Vendor Parameter Typ. Units L1 470nH Nominal IHLP1616ABER47M01 (Vishay) SD12-R47-R (Coiltronics) VLC5020T-R47N (TDK) (TDK) LQH55PNR47NT0 (Murata) L 0.47 μH DCR 20 m Ω COUT 2 Pieces 10 μF, 6.3V, X5R, 0805 GRM21BR60J106M (Murata) C2012X5R0J106M (TDK) C 10.0 μF CIN 10 μF, 6.3V, X5R, 0805 CIN1 10nF, 25V, X7R, 0402 GRM155R71E103K (Murata) C1005X7R1E103K (TDK) C 10 nF CVCC 4.7 μF, 6.3V, X5R, 0603 GRM188R60J475K (Murata) C1608X5R0J475K (TDK) C 4.7 μF R3 (1) Resistor: 1 Ω 0402 Any R 1 Ω Note: 1. R3 is optional and improves IC power supply noise rejection. See Layout recommendations for more information. Pin Configuration FB VOUT PGND PGND SW SW MODE PGOOD EN VCC PVIN PVIN 6 5 4 3 2 1 7 8 9 10 11 12 P1 (GND) Figure 2. 12-Pin, 3x3.5mm MLP (Top View) Pin Definitions Pin # Name Description 1 FB FB. Connect to resistor divider. The IC regulates this pin to 0.8V. 2 VOUT VOUT. Sense pin for VOUT. Connect to COUT. 3, 4 PGND Power Ground. Low-side MOSFET is referenced to this pin. CIN and COUT should be returned with a minimal path to these pins. 5, 6 SW Switching Node. Connect to inductor. P1 GND Ground. All signals are referenced to this pin. 7, 8 PVIN Power Input Voltage. Connect to input power source. Connect to CIN with minimal path. 9 VCC IC Bias Supply. Connect to input power source. Use a separate bypass capacitor CVCC from this pin to the P1 GND terminal between pins 1 and 12. 10 EN Enable. The device is in shutdown mode when this pin is LOW. Do not leave this pin floating. 11 PGOOD Power Good. This open-drain pin pulls LOW if the output falls out of regulation or is in soft-start. 12 MODE MODE / Sync. A logic 0 allows the IC to automatically switch to PFM during light loads. When held HIGH, the IC to stays in PWM mode. The regulator also synchronizes its switching frequency to the frequency provided on this pin. Do not leave this pin floating. Note: 2. P1 is the bottom heat-sink pad. Ground plane should flow through pins 3, 4, and P1 and can be extended through pin 11 if PGOOD’s function is not required, and through pin 12 if MODE is to be grounded, to improve IC cooling. |
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