8

FN6333.3

July 17, 2009

Pin Description

Potentiometers Pins

RWI (I = 0, 1, 2, 3)

RWi is the wiper terminal and is equivalent to the movable

terminal of a mechanical potentiometer. The position of the

wiper within the array is determined by the WRi register.

SHDN

The SHDN pin forces the resistors to end-to-end open circuit

condition and shorts all RWs to GND. When SHDN is

returned to logic high, the previous latch settings put RWi at

the same resistance setting prior to shutdown. This pin is

logically ANDed with the SHDN bit in the ACR register. SPI

interface is still available in shutdown mode and all registers

are accessible. This pin must remain HIGH for normal

operation.

Bus Interface Pins

SERIAL CLOCK (SCK)

This is the serial clock input of the SPI serial interface.

SERIAL DATA OUTPUT (SDO)

The SDO is an open drain serial data output pin. During a

read cycle, the data bits are shifted out at the falling edge of

the serial clock SCK, while the CS input is low.

SDO requires an external pull-up resistor for proper operation.

TEMPERATURE

FIGURE 8. TC FOR VOLTAGE DIVIDER MODE IN ppm

FIGURE 9. MIDSCALE GLITCH, CODE 80h TO 7Fh

FIGURE 10. LARGE SIGNAL SETTLING TIME

-1.0

-0.5

0.0

0.5

1.0

-40

-20

0

20

40

60

80

100

120

TEMPERATURE (ºC)

50k

10k

0

15

30

45

60

75

90

105

16

36

56

76

96

TAP POSITION (DECIMAL)

50k

10k

SIGNAL AT WIPER

(WIPER UNLOADED)

SIGNAL AT WIPER

(WIPER UNLOADED MOVEMENT

FROM 7Fh TO 00h)

SCL

RW

FIGURE 11. DCP CONNECTION IN SHUTDOWN MODE

ISL22449