9

FN7464.2

December 12, 2006

INTEGRATION TIME IN EXTERNAL TIMING MODE

This timing mode is programmed in the command register

00(hex) bit 5. External Timing Mode is recommended when

integration time can be synchronized to an external signal

such as a PWM to eliminate noise.

For Mode1 or Mode2 operation, the integration starts when

needs two sync_iic commands to complete a photodiode

conversion. The integration then stops when another

sync_iic command is received. Writing a logic 1 to the

sync_iic bit ends the current adc integration and starts

another one.

For Mode3, the operation is a sequential Mode1 and Mode2.

The device needs three sync_iic commands to complete two

photodiode measurements. The 1st sync_iic command starts

the conversion of the diode1. The 2nd sync_iic completes the

conversion of diode1 and starts the conversion of diode2. The

3rd sync_iic pules ends the conversion of diode2 and starts

over again to commence conversion of diode1.

int.

internal and external timing modes, with the same

the number of clock cycles per integration is no longer fixed

avoid erroneous Lux readings the integration time must be

short enough not to allow an overflow in the counter register.

Range1 or Range2.

Range3 or Range4.

Noise Rejection

In general, integrating type ADC’s have an excellent noise-

rejection characteristics for periodic noise sources whose

frequency is an integer multiple of the integration time. For

instance, a 60Hz AC unwanted signal’s sum from 0ms to

integration time to be an integer multiple of the periodic

noise signal, greatly improves the light sensor output signal

in the presence of noise.

Design Example 1

The ISl29003 will be designed in a portable system. The

ambient light conditions that the device will be exposed to is

at most 500Lux which is a good office lighting. The light

source has a 50/60Hz power line noise which is not visible

Solution 1 - Using Internal Timing Mode

In order to achieve both 60Hz and 50Hz AC noise rejection,

the integration time needs to be adjusted to coincide with an

integer multiple of the AC noise cycle times.

60Hz and 50Hz is when i = 6, and j= 5.

Next, the Gain/Range needs to be determined. Based on the

application condition given, Lux(max) = 500Lux, a range of

1000Lux is desirable. This corresponds to a Gain/Range

Range1 mode. Also impose a resolution of n = 16-bit. Hence

The Full Scale Range, FSR, needs to be determined. From

Equation 3:

The effective transfer function becomes:

TABLE 13. INTEGRATION TIMES FOR TYPICAL

(k

Ω)

RANGE1

RANGE2

RANGE3

RANGE4

n = 16-BIT

n = 12-BIT

n = 12-BIT

n = 4

50

100

6.4

3.2

0.013

100**

200

13

6.5

0.025

200

400

26

13

0.050

500

1000

64

32

0.125

*Integration time in milliseconds

**Recommended

T

int

i

I2C

f

I2C

----------

=

(EQ. 12)

T

int

65,535

f

OSC

------------------

<

(EQ. 13)

for Internal Timing Mode and Gain/Range is set to Range3 or Range4 only

R

EXT

T

int

327kHz

100

×

×

k

Ω

2

n

---------------------------------------------------------------

=

R

EXT

50k

Ω

=

FSR

1000Lux

100k

Ω

50k

Ω

------------------

=

FSR

2000Lux

=

E

data

2

16

-------------

2000Lux

×

=

ISL29003