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TEA1623PH 데이터시트(PDF) 10 Page - NXP Semiconductors

부품명 TEA1623PH
상세설명  STARplug switched mode power supply controller IC
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제조업체  NXP [NXP Semiconductors]
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TEA1623PH 데이터시트(HTML) 10 Page - NXP Semiconductors

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TEA1623P_TEA1623PH
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 30 August 2010
10 of 20
NXP Semiconductors
TEA1623P; TEA1623PH
STARplug switched mode power supply controller IC
11. Characteristics
Table 6.
Characteristics
Tamb = 25 °C; no overtemperature; all voltages are measured with respect to ground; currents are positive when flowing into
the IC, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supplies
Supply on pin VCC
VCC(start)
start voltage
9
9.5
10
V
VCC(stop)
stop voltage
undervoltage lockout
7.0
7.5
8.0
V
ICC(operate)
operating supply current
normal operation
-
1.3
1.9
mA
ICC(startup)
start-up supply current
start-up
-
180
400
μA
ICC(ch)
charging current
VDRAIN >60V
VCC =0V
−650
−520
−390
μA
VCC =8.5 V
−375
−275
−175
μA
Supply on pin DRAIN
IDRAIN
supply current drawn from pin
DRAIN
no auxiliary supply
-
0.5
-
mA
with auxiliary supply; VDRAIN >60 V
-
30
125
μA
PWM mode
δ
min
minimum duty factor
-
0
-
%
δ
max
maximum duty factor
fosc = 100 kHz
-
75
-
%
Self-oscillating power supply mode
Vdemag
demagnetization recognition
voltage level
50
100
150
mV
tsuppr
time of suppression of transformer
ringing at start of secondary stroke
1.0
1.5
2.0
μs
Oscillator: pin RC
VRC(min)
minimum voltage of RC oscillator
setting
60
75
90
mV
VRC(max)
maximum voltage of RC oscillator
setting
2.4
2.5
2.6
V
tRC(ch)
RC charging time
-
1
-
μs
fosc
oscillator frequency range
10
-
200
kHz
Duty factor regulator: pin REG
VREG
input voltage on pin REG
2.4
2.5
2.6
V
GV(erroramp)
voltage gain of error amplifier
-
20
-
dB
VREG(clamp)
clamping voltage on pin REG
IREG =6mA
-
-
7.5
V
Valley switching recognition
dV/dtvalley
valley recognition
−102
-
+102
V/
μs
fvalley
ringing frequency for valley
switching
N
× V
o = 100 V
200
550
800
kHz
td(valley-on)
delay from valley recognition to
switch-on
-
150
-
ns
Output stage (FET)
IL(drain)
drain leakage current
VDRAIN = 650 V
-
-
125
μA


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