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LB1846M 데이터시트(PDF) 4 Page - Sanyo Semicon Device |
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LB1846M 데이터시트(HTML) 4 Page - Sanyo Semicon Device |
4 / 6 page Truth Tables [LB1846M] Note: 1. “—” indicates a “don’t care” input. 2. If two high levels (H/H) are input to the IN1/IN2 pins with the timing shown in x in the figure below, then the IN2 input that arrived later will be ignored and the IC will function as though an H/L combination is applied to the IN1/IN2 pins. Similarly, the timing shown in results in a L/H combination on the IN1/IN2 pins. No. 5339-4/6 LB1846M, 1848M IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4 Notes L L L L OFF OFF OFF OFF Standby H L L L H L OFF OFF H L H L H L H L L L H L OFF OFF H L L H H L L H H L 1-2 phase excitation L H L L L H OFF OFF L H L H L H L H L L L H OFF OFF L H H L L H H L L H H H — — The logic output for the first high-level — — H H input is produced. *2 [LB1848M] Note: “—” indicates a “don’t care” input. ENA IN1 IN2 OUT1 OUT2 OUT3 OUT4 Notes L — — OFF OFF OFF OFF Standby L L H L H L H L H H L L H 2-phase excitation H H L H L H H L L H H L |
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