전자부품 데이터시트 검색엔진 |
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LC66562B 데이터시트(PDF) 6 Page - Sanyo Semicon Device |
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LC66562B 데이터시트(HTML) 6 Page - Sanyo Semicon Device |
6 / 13 page No. 5996-6/13 LC662104A, 662106A, 662108A Continued from preceding page. Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to VDD. CMOS output: Complementary output. OD output: Open-drain output. Pin I/O Overview Output driver type Options State after a reset P50 P51/DP P52/DT P53/INT2 OSC1 OSC2 RES TEST VDD VSS I/O ports P50 to P53 • Input or output in 4-bit or 1-bit units • P51 is also used for dial pulse output • P52 is also used for DTMF output • P53 is also used as the INT2 interrupt request. System clock oscillator connections When an external clock is used, leave OSC2 open and connect the clock signal to OSC1. System reset input When the P33/HOLD pin is at the high level, a low level input to the RES pin will initialize the CPU. CPU test pin This pin must be connected to VSS during normal operation. Power supply pins I/O I O I I • Pch: Pull-up MOS type • Nch: Intermediate sink current type • Nch: +15-V handling when OD option selected (P51 and P53 only) • Pull-up MOS or Nch OD output • Output level on reset • Output level after a reset (An external pull-up resistor must be supplied when used for DT output.) Ceramic oscillator or external clock selection High or low (option) Option selection |
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유사한 설명 - LC66562B |
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