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BYC10600 데이터시트(PDF) 8 Page - Fairchild Semiconductor

부품명 BYC10600
상세설명  Power Factor Correction Converter Design
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홈페이지  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

BYC10600 데이터시트(HTML) 8 Page - Fairchild Semiconductor

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AN-6982
APPLICATION NOTE
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.0 • 6/8/10
8
[STEP-3] PFC Inductor Design
The duty cycle of boost switch at the peak of line voltage is
given as:
2
BOUT
LINE
LP
BOUT
VV
D
V
=
(15)
Then the current ripple of the boost inductor at the peak of
line voltage is given as:
22
1
LINE
BOUT
LINE
L
BOOST
BOUT
SW
VV
V
I
L
Vf
Δ=
(16)
The average of boost inductor current over one switching
cycle at the peak of the line voltage is given as:
.
2
OUT
LAVG
LINE
P
I
V
η
=
(17)
The ripple factor (KRF), the ratio between the inductor
current ripple and average inductor current at the peak of
line voltage load is given as:
2
.
2
1
LINE
BOUT
LINE
L
RF
L AVG
OUT
BOOST
BOUT
SW
VV
V
I
K
I
PL
V
f
η ⋅−
Δ
==
(18)
As depicted in Figure 15, the ripple factor has the
maximum value when the line voltage is:
.
2
3
BOUT
LINE MRF
V
V
=
(19)
IL
.
L AVG
I
.
L AVG
I
Δ
.
L
RF
LAVG
I
K
I
Δ
=
85VAC
264VAC
2/ 3
BOUT
V
Figure 15. Ripple Factor with Different Line Voltages
Therefore,
with
a
given
current
ripple
factor
(KRF=ΔIL/ILAVG), the boost inductor value is obtained as:
2
2
1
27
η
=⋅
BOUT
BOOST
RF
OUT
SW
V
L
K
Pf
(20)
(Design Example)
The largest ripple factor is
obtained at a line voltage as:
2
2 387
182
33
BOUT
LINE
AC
V
VV
==
=
With the ripple current specification (50%), the boost
inductor is obtained as:
2
2
3
2
12 387 0.94
1
27
0.5 350
27 65 10
916
η
μ
⋅⋅
=⋅
=
⋅⋅
⋅×
=
BOUT
BOOST
RF
OUT
SW
V
L
KP
f
H
The inductor current ripple at low line is obtained as:
63
22
1
285
387
285
1
1.39
387
916 10
65 10
LINE
BOUT
LINE
L
BOOST
BOUT
SW
VV
V
I
LV
f
A
Δ=
⋅−
=⋅
=
××
The average inductor current at the peak of the line
voltage for low line is obtained as:
.
.
2
2 350
6.19
85 0.94
η
==
=
⋅⋅
OUT
LAVG
LINE MIN
P
I
A
V
The maximum of the inductor current at low line is
obtained as:
.
/ 2 6.19 1.39 / 2 6.89
PK
LL AVG
L
I
II
A
=+ Δ
=
+
=
[STEP-4] PFC Output Capacitor Selection
The output voltage ripple should be considered when
selecting the PFC output capacitor. Figure 16 shows the
twice line frequency ripple on the output voltage. With a
given specification of output ripple, the condition for the
output capacitor is obtained as:
,
2
BOUT
BOUT
LINE
BOUT RIPPLE
I
C
fV
π
>
⋅⋅
(21)
where IBOUT is nominal output current of boost PFC stage
and VBOUT,RIPPLE is the peak-to-peak output voltage ripple
specification.
The hold-up time also should be considered when
determining the output capacitor as:
22
,
2
OUT
HOLD
BOUT
BOUT
BOUT MIN
Pt
C
VV
>
(22)
where POUT is nominal output power of boost PFC stage,
tHOLD is the required hold-up time, and VBOUT,MIN is the
allowable minimum PFC output voltage during hold-up time.


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