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FAN5236 데이터시트(PDF) 3 Page - Fairchild Semiconductor

부품명 FAN5236
상세설명  Dual Mobile-Friendly DDR / Dual-Output PWM Controller
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제조업체  FAIRCHILD [Fairchild Semiconductor]
홈페이지  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN5236 데이터시트(HTML) 3 Page - Fairchild Semiconductor

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© 2002 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN5236 • Rev. 1.3.2
3
Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin #
Name
Description
1
AGND
Analog Ground
. This is the signal ground reference for the IC. All voltage levels are
measured with respect to this pin.
2
LDRV1
Low-Side Drive
. The low-side (lower) MOSFET driver output. Connect to gate of low-side
MOSFET.
27
LDRV2
3
PGND1
Power Ground
. The return for the low-side MOSFET driver. Connect to source of low-side
MOSFET.
26
PGND2
4
SW1
Switching Node
. Return for the high-side MOSFET driver and a current sense input.
Connect to source of high-side MOSFET and low-side MOSFET drain.
25
SW2
5
HDRV1
High-Side Drive
. High-side (upper) MOSFET driver output. Connect to gate of high-side
MOSFET.
24
HDRV2
6
BOOT1
BOOT
. Positive supply for the upper MOSFET driver. Connect as shown in Figure 4.
23
BOOT2
7
ISNS1
Current-Sense Input
. Monitors the voltage drop across the lower MOSFET or external
sense resistor for current feedback.
22
ISNS2
8
EN1
Enable
. Enables operation when pulled to logic HIGH. Toggling EN resets the regulator
after a latched fault condition. These are CMOS inputs whose state is indeterminate if left
open.
21
EN2
9
FPWM1
Forced PWM Mode
. When logic LOW, inhibits the regulator from entering Hysteretic Mode;
otherwise tie to VOUT. The regulator uses VOUT on this pin to ensure a smooth transition from
Hysteretic Mode to PWM Mode. When VOUT is expected to exceed VCC, tie to VCC.
20
FPWM2
10
VSEN1
Output Voltage Sense
. The feedback from the outputs. Used for regulation as well as PG,
under-voltage, and over-voltage protection and monitoring.
19
VSEN2
11
ILIM1
Current Limit 1
. A resistor from this pin to GND sets the current limit.
12
SS1
Soft Start
. A capacitor from this pin to GND programs the slew rate of the converter during
initialization. During initialization, this pin is charged with a 5mA current source.
17
SS2
AGND
LDRV1
PGND1
SW1
HDRV1
BOOT1
ISNS1
EN1
FPWM1
VSEN1
ILIM1
SS1
DDR
VIN
FAN5236
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
LDRV2
PGND2
SW2
HDRV2
BOOT2
ISNS2
EN2
FPWM2
VSEN2
ILIM2/REF2
SS2
PG2/REF2OUT
PG1


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