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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADM1276 데이터시트(PDF) 1 Page - Analog Devices |
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ADM1276 데이터시트(HTML) 1 Page - Analog Devices |
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1 / 48 page  Hot Swap Controller and Digital Power and Energy Monitoring with PMBus Interface ADM1276 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. FEATURES Controls supply voltages from 2 V to 20 V 370 ns response time to short circuit Resistor-programmable 5 mV to 25 mV current limit ±1% accurate, 12-bit ADC for current, VIN/VOUT readback Charge pumped gate drive for multiple external N-channel FETs High gate drive voltage to ensure lowest RDSON Foldback for tighter FET SOA protection Automatic retry or latch-off on current fault Programmable current-limit timer for SOA Programmable, multifunction GPO Power-good status output Analog UV and OV protection ENABLE pin Peak detect registers for current and voltage PMBus fast mode compliant interface 20-lead LFCSP APPLICATIONS Power monitoring and control/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers FUNCTIONAL BLOCK DIAGRAM GATE SENSE+ TIMER TIMER ADM1276-3 GND SENSE– VCC VCP VCAP ENABLE IOUT UV OV 1.0V 1.0V VOUT VOUT 12-BIT ADC SCL SDA ADR SENSE+ IOUT LDO CHARGE PUMP TIMEOUT GPO2/ALERT2 PWRGD LATCH TIMER ON SS CURRENT LIMIT FLB ISET TIMEOUT CURRENT LIMIT CONTROL REF SELECT 1.0V GATE DRIVE/ LOGIC LOGIC AND PMBus ×50 + + + – – – Figure 1. GENERAL DESCRIPTION The ADM1276 is a hot swap controller that allows a circuit board to be removed from or inserted into a live backplane. It also features current and voltage readback via an integrated 12-bit analog-to- digital converter (ADC), accessed using a PMBus™ interface. The load current is measured using an internal current sense amplifier that measures the voltage across a sense resistor in the power path via the SENSE+ and SENSE− pins. A default limit of 20 mV is set, but this limit can be adjusted, if required, using a resistor divider network from the internal reference voltage to the ISET pin. The ADM1276 limits the current through the sense resistor by controlling the gate voltage of an external N-channel FET in the power path, via the GATE pin. The sense voltage—and, therefore, the load current—is maintained below the preset maximum. The ADM1276 protects the external FET by limiting the time that the FET remains on while the current is at its maximum value. This current-limit time is set by the choice of capacitor connected to the TIMER pin. In addition, a foldback resistor network can be used to actively lower the current limit as the voltage across the FET is increased. This helps to maintain constant power in the FET and allows the safe operating area (SOA) to be adhered to in an effective manner. In case of a short-circuit event, a fast internal overcurrent detector responds within 370 ns and signals the gate to shut down. A 1500 mA pull-down device ensures a fast FET response. The ADM1276 features overvoltage (OV) and undervoltage (UV) protection, programmed using external resistor dividers on the UV and OV pins. A PWRGD signal can be used to detect when the output supply is valid, using the FLB pin to monitor the output. A GPO pin can be configured as an output signal that can be asserted when a programmed current or voltage level is reached. The 12-bit ADC can measure the current in the sense resistor, as well as the supply voltage on the SENSE+ pin or the output voltage. A PMBus interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by a PMBus command. Alternatively, the ADC can run conti- nuously, and the user can read the latest conversion data whenever required. As many as four unique PMBus addresses can be selected, depending on the way that the ADR pin is connected. The ADM1276 is available in a 20-lead LFCSP and has a LATCH pin that can be configured for automatic retry or latch-off when an overcurrent fault occurs. |
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