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FM31T378-G 데이터시트(PDF) 3 Page - Ramtron International Corporation

부품명 FM31T378-G
상세설명  System Supervisor & Temperature Compensated RTC(TCXO) with Embedded Crystal
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제조업체  RAMTRON [Ramtron International Corporation]
홈페이지  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM31T378-G 데이터시트(HTML) 3 Page - Ramtron International Corporation

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FM31T372/374/376/378-G
Rev. 1.1
Apr. 2011
Page 3 of 26
Figure 1.
Block Diagram
Pin Descriptions
Pin Name
Type
Pin Description
A0, A1
Input
Device select inputs are used to address multiple memories on a serial bus. To select the device
the address value on the two pins must match the corresponding bits contained in the device
address. The device select pins are pulled down internally.
CNT1, CNT2
Input
Event Counter Inputs: These battery-backed inputs increment counters when an edge is detected
on the corresponding CNT pin. The polarity is programmable. These pins should not be left
floating. Tie to ground if pins are not used.
/INT
Output
Event Counter Driven Interrupt Output. This is a battery backed open-drain output. It goes low
for at least 100 ms upon changes on either CNT1 or CNT2 pin. This pin can be left floating if
not used.
CAL/PFO
Output
In normal operation, this is the early power-fail output. In CAL mode, it supplies a 512 Hz
square-wave output for clock calibration.
FOUT
Output
32.768kHz Clock Output. This is a battery backed open-drain output. This pin can be disabled
by setting the FOEN bit to “0”. This pin can be left floating if not used.
/RST
I/O
Active low reset output with weak pull-up. Also input for manual reset.
SDA
I/O
Serial Data & Address: This is a bi-directional line for the two-wire interface. It is open-drain
and is intended to be wire-OR‟d with other devices on the two-wire bus. The input buffer
incorporates a Schmitt trigger for noise immunity and the output driver includes slope control
for falling edges. A pull-up resistor is required.
SCL
Input
Serial Clock: The serial clock line for the two-wire interface. Data is clocked out of the device
on the falling edge, and into the device on the rising edge. The SCL input also incorporates a
Schmitt trigger input for noise immunity.
PFI
Input
Early Power-fail Input: Typically connected to an unregulated power supply to detect an early
power failure. This pin should not be left floating.
VBAK
Supply
Backup supply voltage: A 3V battery or a large value capacitor. If no backup supply is used, this
pin should be tied to VDD.
VDD
Supply
Supply Voltage
F-RAM
Array
2-Wire
Interface
SCL
SDA
RST
A1, A0
CAL/PFO
PFI
VDD
VBAK
Temperature
Compensated
RTC
~2.4V
-
+
RTC Registers
Event
Counters
CNT1
CNT2
Special
Function
Registers
S/N
FOUT
/INT
LockOut
LockOut
+
-
1.2V
Watchdog
LV Detect
Switched Power
512Hz
Battery Backed
Nonvolatile
32.768
kHz
Temp
Sensor


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