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LC875J56C 데이터시트(PDF) 10 Page - Sanyo Semicon Device |
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LC875J56C 데이터시트(HTML) 10 Page - Sanyo Semicon Device |
10 / 23 page LC875J64C/875J56C/875J48C No.8302-10/23 Port Output Types The table below lists the types of port outputs and the presence/absence of a pull-up resistor. Data can be read into any input port even if it is in the output mode. Port Name Option Selected in Units of Option Type Output Type Pull-up Resistor 1 CMOS Programmable (Note 1) P00 to P07 1-bit 2 Nch-open drain No 1 CMOS Programmable P10 to P17 1-bit 2 Nch-open drain Programmable 1 CMOS Programmable P20 to P27 1-bit 2 Nch-open drain Programmable P70 - No Nch-open drain Programmable P71 to P73 - No CMOS Programmable P80 to P86 - No Nch-open drain No PWM2, PWM3 - No CMOS No 1 CMOS Programmable PB0 to PB7 1-bit 2 Nch-open drain Programmable 1 CMOS Programmable PC0 to PC7 1-bit 2 Nch-open drain Programmable XT1 - No Input for 32.768kHz crystal oscillator (Input only) No XT2 - No Output for 32.768kHz crystal oscillator (Nch-open drain when in general-purpose output mode) No Note 1: Programmable pull-up resistors for port 0 are controlled in 4-bit units (P00 to 03, P04 to 07). *1: Connect the IC as shown below to minimize the noise input to the VDD1 pin. Be sure to electrically short the VSS1, VSS2, and VSS3 pins. *2: The internal memory is sustained by VDD1. If none of VDD2 and VDD3 are backed up, the high level output at the ports are unstable in the HOLD backup mode, allowing through current to flow into the input buffer and thus shortening the backup time. Make sure that the port outputs are held at the low level in the HOLD backup mode. Power supply LSI VDD1 For backup *2 VDD2 VDD3 VSS3 VSS2 VSS1 |
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유사한 설명 - LC875J56C |
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