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AM3352 데이터시트(PDF) 2 Page - Texas Instruments |
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AM3352 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 195 page AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 SPRS717B – OCTOBER 2011 – REVISED JANUARY 2012 www.ti.com – Error Locator Module (ELM) • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB • Used in Conjunction with the GPMC to and Peripherals [MMC/SD, UART, SPI, Locate Addresses of Data Errors from I2C, etc.], L3, L4, Ethernet, GFX [SGX530], Syndrome Polynomials Generated Using LCD Pixel Clock) a BCH Algorithm – Power • Supports 4-Bit, 8-Bit, and 16-Bit per 512-byte Block Error Location Based on • Two Non-Switchable Power Domains BCH Algorithms (Real-Time Clock [RTC], Wake-Up Logic [WAKE-UP]) • Programmable Real-Time Unit Subsystem (PRUSS) • Three Switchable Power Domains (MPU Subsystem [MPU], SGX530 [GFX], – Two Programmable Real-Time Units (PRUs) Peripherals and Infrastructure [PER]) • 32-Bit Load/Store RISC Processor • Implements SmartReflex ™ Class 2B for Capable of Running at 200 MHz Core Voltage Scaling Based On Die • 8 KB Instruction RAM with Single-Error Temperature, Process Variation and Detection (parity) Performance (Adaptive Voltage Scaling • 8 KB Data RAM with Single-Error [AVS]) Detection (parity) • Dynamic Voltage Frequency Scaling • Single-Cycle 32-Bit Multiplier with 64-Bit (DVFS) Accumulator • Real-Time Clock (RTC) • Enhanced GPIO Module Provides – Real-Time Date (Day/Month/Year/Day of Shift-In/Out Support and Parallel Latch on Week) and Time (Hours/Minutes/Seconds) External Signal Information – 12 KB of Shared RAM with Single-Error – Internal 32.768-kHz Oscillator, RTC Logic Detection (parity) and 1.1-V Internal LDO – Three 120-byte Register Banks Accessible – Independent Power-on-Reset by Each PRU (RTC_PWRONRSTn) Input – Interrupt Controller Module (INTC) for – Dedicated Input Pin (EXT_WAKEUP) for Handling System Input Events External Wake Events – Local Interconnect Bus for Connecting – Programmable Alarm Can be Used to Internal and External Masters to the Generate Internal Interrupts to the PRCM (for Resources Inside the PRUSS Wake Up) or Cortex-A8 (for Event – Peripherals Inside the PRUSS Notification) • One UART Port with Flow Control Pins, – Programmable alarm Can be Used with Supports Up to 12 Mbps External Output (PMIC_POWER_EN) to • Two MII Ethernet Ports that Support Enable the Power Management IC to Restore Industrial Ethernet, such as EtherCAT® Non-RTC Power Domains • One MDIO Port • Peripherals • One Enhanced Capture (eCAP) Module – Up to Two USB 2.0 High-Speed OTG Ports • Power Reset and Clock Management (PRCM) with Integrated PHY Module – Up to Two Industrial Gigabit Ethernet MACs – Controls the entry and Exit of Stand-By and (10/100/1000 Mbps) Deep-Sleep Modes • Integrated Switch – Responsible for Sleep Sequencing, Power • Each MAC Supports MII/RMII/RGMII and Domain Switch-Off Sequencing, Wake-Up MDIO Interfaces Sequencing and Power Domain Switch-On • Ethernet MACs and Switch Can Operate Sequencing Independent of Other Functions – Clocks • IEEE 1588 Precision Time Protocol (PTP) • Integrated 15-35 MHz High-Frequency – Up to Two Controller-Area Network (CAN) Oscillator Used to Generate a Reference Ports Clock for Various System and Peripheral • Supports CAN Version 2 Parts A and B Clocks – Up to Two Multichannel Audio Serial Ports • Supports Individual Clock Enable/Disable (McASP) Control for Subsystems and Peripherals • Transmit/Receive Clocks Up to 50 MHz to Facilitate Reduced Power Consumption • Up to Four Serial Data Pins per McASP Port with Independent TX/RX Clocks 2 Device Summary Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 |
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