TS1101

Touchstone Semiconductor, Inc.

Page 11

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TS1101DS r1p0

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RTFDS

PACKAGE OUTLINE DRAWING

6-Pin SOT23 Package Outline Drawing

(N.B., Drawings are not to scale)

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assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use, and all

information provided by Touchstone Semiconductor and its suppliers is provided on an AS IS basis, WITHOUT WARRANTY OF ANY KIND.

Touchstone Semiconductor reserves the right to change product specifications and product descriptions at any time without any advance

notice. No license is granted by implication or otherwise under any patent or patent rights of Touchstone Semiconductor. Touchstone

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respective owners.

0° ~ 8°

Note:

Dimension are exclusive of mold flash and gate burr.

2. Dimension are exclusive of solder plating.

3. The foot length measuring is based on the gauge plane method.

4. Package is surface to be matte finish VDI 11~13.

5. Dimensions and tolerances are as per ANSI Y14.5M, 1982.

6. This part is compliant with EIAJ specification SC74A and JEDEC MO-178 AB spec.

7. Die is facing up for mold, Die is facing down for trim/form, ie. reverse trim/form.

8. All dimensions are in mm.

0.050(MIN)

0.15(MAX)

10° TYP.

(2 Plcs)

10° TYP.

(2 Plcs)

0.60 - 0.80

10° TYP.

(2 Plcs)

0.09 – 0.127

1.50 – 1.75

0.25

Guage

Plane

0.30 - 0.55

10° TYP.

(2 Plcs)

0.50 -0.70

2.80 - 3.00

0.950

0.950

TYP.

TYP.

0.300(MIN)

0.500(MAX)