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C501 Data Sheet
Revision History :
Previous Releases :
11.92, 11.93, 08.94, 08.95, 10.96
Subjects (changes since last revision)
C501G-1E OTP version included
8, 9, 10
8, 9, 10
Ordering information resorted and C501G-1E types added
Table with literature hints added
Pin configuration logic symbol for pins EA/Vpp and ALE/PROG updated
Pin description for ALE/PROG and EA/Vpp completed
Port 1, 3, 2 pin description: “bidirectional” replaced by “quasi-
Block diagram updated for C501G-1E
New design of register (PSW) description
“Memory organization” added
Actualized design of the SFR tables
Reset value of T2CON corrected
Description for the C501-1E OTP version added
DC characteristics for C501-1E added
Timing “External Clock Drive” now behind “Data Memory Cycle”
AC characteristics for C501-1E added