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Q67120-C723 데이터시트(PDF) 17 Page - Siemens Semiconductor Group |
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Q67120-C723 데이터시트(HTML) 17 Page - Siemens Semiconductor Group |
17 / 61 page SAB 80C517/80C537 Semiconductor Group 16 Functional Description The SAB 80C517 is based on 8051 architecture. It is a fully compatible member of the Siemens SAB 8051/80C51 microcontroller family being a significantly enhanced SAB 80C515. The SAB 80C517 is therefore 100 % compatible with code written for the SAB 80C515. CPU Having an 8-bit CPU with extensive facilities for bit-handling and binary BCD arithmetics the SAB 80C517 is optimized for control applications. With a 12 MHz crystal, 58% of the instructions execute in 1 µs. Being designed to close the performance gap to the 16-bit microcontroller world, the SAB 80C517’s CPU is supported by a powerful 32-/16-bit arithmetic unit and a more flexible addressing of external memory by eight 16-bit datapointers. Memory Organisation According to the SAB 8051 architecture, the SAB 80C517 has separate address spaces for program and data memory. Figure 2 illustrates the mapping of address spaces. Figure 2 Memory Mapping |
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