3

®

DAC716

DIFFERENTIAL

LINEARITY ERROR

TEMPERATURE

PRODUCT

PACKAGE

T

RANGE

DAC716P

Plastic DIP

±8 LSB

–40

°C to +85°C

DAC716U

Plastic SOIC

±8 LSB

–40

°C to +85°C

DAC716PB

Plastic DIP

±4 LSB

–40

°C to +85°C

DAC716UB

Plastic SOIC

±4 LSB

–40

°C to +85°C

DAC716PK

Plastic DIP

±2 LSB

0

°C to +70°C

DAC716UK

Plastic SOIC

±2 LSB

0

°C to +70°C

PIN CONFIGURATION

Top View

ELECTROSTATIC

DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per-

formance degradation to complete device failure. Burr-

Brown Corporation recommends that all integrated circuits

be handled and stored using appropriate ESD protection

methods.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet

published specifications.

PIN DESCRIPTIONS

PIN

LABEL

DESCRIPTION

1

CLK

Serial Data Clock

Enable for Input Register (Active Low)

Enable for D/A Latch (Active Low)

4

SDI

Serial Data Input

5

SDO

Serial Data Output

6

DCOM

Digital Supply Ground

Positive Power Supply

8

ACOM

Analog Supply Ground

D/A Output

10

NC

No Connection

11

NC

No Connection

12

Voltage Reference Output

13

Offset Adjust

Offset Adjust

14

Gain Adjust

Gain Adjust

15

Negative Power Supply

16

CLR

Clear

ORDERING INFORMATION

SOIC/DIP

ACOM to DCOM ...............................................................................

±0.5V

External Voltage Applied to BPO and Range Resistors .....................

±V

CC

V

SDO ............................................................... Indefinite Short to Common

Power Dissipation .......................................................................... 750mW

Storage Temperature ...................................................... –60

°C to +150°C

Lead Temperature (soldering, 10s) ................................................ +300

°C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”

may cause permanent damage to the device. Exposure to absolute maximum

conditions for extended periods may affect device reliability.

CLK

A

0

A

1

SDI

SDO

DCOM

+V

CC

ACOM

DAC716

CLR

–V

CC

Gain Adjust

Offset Adjust

V

REF OUT

NC

NC

V

OUT

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

PACKAGE DRAWING

PRODUCT

PACKAGE

DAC716P

Plastic DIP

180

DAC716U

Plastic SOIC

211

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet,

or Appendix C of Burr-Brown IC Data Book.

PACKAGE INFORMATION