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SL74HC652N 데이터시트(PDF) 6 Page - System Logic Semiconductor

부품명 SL74HC652N
상세설명  Octal 3-State Bus Transceivers and D Flip-Flops(High-Performance Silicon-Gate CMOS)
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제조업체  SLS [System Logic Semiconductor]
홈페이지  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL74HC652N 데이터시트(HTML) 6 Page - System Logic Semiconductor

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SL74HC652
System Logic
Semiconductor
SLS
FUNCTION TABLE
Dir.
OE
CAB CBA
SAB
SBA
A
B
FUNCTION
INPUTS
INPUTS
Both the A bus and the B bus are inputs.
L
H
X
X
X
X
Z
Z
The output functions of the A and B bus
are disabled.
X
X
INPUTS
INPUTS
Both the A and B bus are used for inputs
to the internal flip-flops. Data at the bus
will be stored on low to high transition of
the clock inputs.
OUTPUTS
INPUTS
The A bus are outputs and the B bus are
inputs.
X
*
X
X
L
L
H
L
H
The data at the B bus are displayed at the
A bus.
L
L
X
*
X
L
L
H
L
H
The data at the B bus are displayed at the
A bus. The data of the B bus are stored to
the internal flip-flops on low to high
transition of the clock pulse.
X
*
X
X
H
Qn
X
The data stored to the internal flip-flops,
are displayed at the A bus.
X
*
X
H
H
L
H
L
The data at the B bus are stored to the
internal flip-flops on low to high transition
of the clock pulse. The states of the
internal flip-flops output directly to the A
bus.
INPUTS
OUTPUTS
The A bus are inputs and the B bus are
outputs.
X
X
*
L
X
L
H
L
H
The data at the A bus are displayed at the
B bus.
H
H
X
*
L
X
L
H
L
H
The data at the B bus are displayed at the
A bus. The data of the B bus are stored to
the internal flip-flops on low to high
transition of the clock pulse.
X
X
*
H
X
X
Qn
The data stored to the internal flip-flops
are displayed at the B bus.
X
*
H
X
L
H
L
H
The data at the A bus are stored to the
internal flip-flops on low to high transition
of the clock pulse. The states of the
internal flip-flops output directly to the B
bus.
OUTPUTS
OUTPUTS
Both the A bus and the B bus are outputs
H
L
X
X
H
H
Qn
Qn
The data stored to the internal flip-flops
are displayed at the A and B bus
respectively.
H
H
Qn
Qn
The output at the A bus are displayed at
the B bus, the output at the B bus are
displayed at the A bus respec.
X : DON’T CARE
Z : HIGH IMPEDANCE
Qn : THE DATA STORED TO THE INTERNAL FLIP-FLOPS BY MOST RECENT LOW TO HIGH TRANSITION
OF THE CLOCK INPUTS
* : THE DATA AT THE A AND B BUS WILL BE STORED TO THE INTERNAL FLIP-FLOPS ON EVERY LOW TO
TRANSITION OF THE CLOCK INPUTS


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