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CD74HC4017QPWREP 데이터시트(PDF) 3 Page - Texas Instruments

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부품명 CD74HC4017QPWREP
상세설명  HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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CD74HC4017EP
HIGHSPEED CMOS LOGIC DECADE COUNTER/DIVIDER
WITH 10 DECODED OUTPUTS
SCLS550 − DECEMBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1)
−0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < −0.5 V or VO > VCC + 0.5 V)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Source or sink current per output pin, IO (VO > −0.5 V or VO < VCC + 0.5 V)
±25 mA
. . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): M package
73
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
108
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ
150
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (during soldering):
At distance 1/16
± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max
300
°C
. . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
−65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. All voltages referenced to GND unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
VCC
Supply voltage
2
6
V
VCC = 2 V
1.5
VIH
High-level input voltage
VCC = 4.5 V
3.15
V
VIH
High-level input voltage
VCC = 6 V
4.2
V
VCC = 2 V
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
V
VIL
Low-level input voltage
VCC = 6 V
1.8
V
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
VCC = 2 V
0
1000
tt
Input transition (rise and fall) time
VCC = 4.5 V
0
500
ns
tt
Input transition (rise and fall) time
VCC = 6 V
0
400
ns
TA
Operating free-air temperature
−40
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


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