SN74SSTV32877

26-BIT REGISTERED BUFFER

WITH SSTL_2 INPUTS AND OUTPUTS

SCES378B – OCTOBER 2001 – REVISED MAY 2002

4

POST OFFICE BOX 655303

recommended operating conditions (see Note 4)

MIN

NOM

MAX

UNIT

VCC

Supply voltage

VDDQ

2.7

V

VDDQ

Output supply voltage

2.3

2.7

V

VREF

Reference voltage (VREF = VDDQ/2)

1.15

1.25

1.35

V

VTT

Termination voltage

VREF–40mV

VREF

VREF+40mV

V

VI

Input voltage

0

VCC

V

VIH

AC high-level input voltage

OE, data inputs

VREF+310mV

V

VIL

AC low-level input voltage

OE, data inputs

VREF–310mV

V

VIH

DC high-level input voltage

OE, data inputs

VREF+150mV

V

VIL

DC low-level input voltage

OE, data inputs

VREF–150mV

V

VIH

High-level input voltage

RESET

1.7

V

VIL

Low-level input voltage

RESET

0.7

V

VICR

Common-mode input voltage range

CLK, CLK

0.97

1.53

V

VI(PP) Peak-to-peak input voltage

CLK, CLK

360

mV

IOH

High-level output current

-20

mA

IOL

Low-level output current

20

mA

TA

Operating free-air temperature

0

70

_C

NOTE 4: The RESET input of the device must be held at VCC or GND to ensure proper device operation. The differential inputs must not be floating

unless RESET is low. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.