SN74BCT8373

SCAN TEST DEVICE

WITH OCTAL DTYPE LATCHES

SCBS471 − JUNE 1990 − REVISED JUNE 1994

2−7

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Shift-DR

While in the stable Shift-DR state, data is serially shifted through the selected data register on each TCK cycle.

The first shift occurs on the first rising edge of TCK after entry to the Shift-DR state (i.e., no shifting occurs during

the TCK cycle in which the TAP controller changes from Capture-DR to Shift-DR or from Exit2-DR to Shift-DR).

The last shift occurs on the rising edge of TCK upon which the TAP controller exits the Shift-DR state.

Exit1-DR, Exit2-DR

The Exit1-DR and Exit2-DR states are temporary states that end a data-register scan. It is possible to return

to the Shift-DR state from either Exit1-DR or Exit2-DR without recapturing the data register.

Pause-DR

No specific function is performed in the stable Pause-DR state, in which the TAP controller can remain

indefinitely. The Pause-DR state suspends and resumes data-register scan operations without loss of data.

Update-DR

If the current instruction calls for the selected data register to be updated with current data, then such update

occurs on the falling edge of TCK following entry to the Update-DR state, at which time TDO also goes from the

active state to the high-impedance state.

Capture-IR

In the Capture-IR state, the instruction register captures its current status value. This capture operation occurs

on the rising edge of TCK upon which the TAP controller exits the Capture-IR state.

Upon entry to the Capture-IR state, the instruction register is placed in the scan path between TDI and TDO and,

on the first falling edge of TCK, TDO goes from the high-impedance state to an active state. If the TAP controller

has not passed through the Test-Logic-Reset state since the last scan operation, TDO will enable to the level

present when it was last disabled. If the TAP controller has passed through the Test-Logic-Reset state since the

last scan operation, TDO will enable to a low level.

For the SN74BCT8373, the status value loaded in the Capture-IR state is the fixed binary value 10000001.

Shift-IR

While in the stable Shift-IR state, instruction data is serially shifted through the instruction register on each TCK

cycle. The first shift occurs on the first rising edge of TCK after entry to the Shift-IR state (i.e., no shifting occurs

during the TCK cycle in which the TAP controller changes from Capture-IR to Shift-IR or from Exit2-IR to

Shift-IR). The last shift occurs on the rising edge of TCK upon which the TAP controller exits the Shift-IR state.

Exit1-IR, Exit2-IR

The Exit1-IR and Exit2-IR states are temporary states that end an instruction-register scan. It is possible to

return to the Shift-IR state from either Exit1-IR or Exit2-IR without recapturing the instruction register.

Pause-IR

No specific function is performed in the stable Pause-IR state, in which the TAP controller can remain indefinitely.

The Pause-IR state suspends and resumes instruction-register scan operations without loss of data.

Update-IR

The current instruction is updated and takes effect on the falling edge of TCK following entry to the Update-IR

state, at which time TDO also goes from the active state to the high-impedance state.