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SN74LV4052ATPWREP 데이터시트(PDF) 1 Page - Texas Instruments |
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SN74LV4052ATPWREP 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 12 page SN74LV4052AEP DUAL 4CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER SCLS502C − MAY 2003 − REVISED MAY 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of −40 °C to 105°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Supports Mixed-Mode Voltage Operation on All Ports D Fast Switching † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. D High On-Off Output-Voltage Ratio D Low Crosstalk Between Switches D Extremely Low Input Current D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering information This dual 4-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation. The SN74LV4052A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING −40 °C to 105°C SOIC − D Tape and reel SN74LV4052ATDREP LV4052ATEP −40 °C to 105°C TSSOP − PW Tape and reel SN74LV4052ATPWREP L4052EP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS ON INH B A ON CHANNEL L L L 1Y0, 2Y0 L L H 1Y1, 2Y1 L H L 1Y2, 2Y2 L H H 1Y3, 2Y3 H X X None PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 2Y0 2Y2 2-COM 2Y3 2Y1 INH GND GND VCC 1Y2 1Y1 1-COM 1Y0 1Y3 A B D OR PW PACKAGE (TOP VIEW) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2004, Texas Instruments Incorporated |
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