전자부품 데이터시트 검색엔진 |
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CXA1391Q 데이터시트(PDF) 1 Page - Sony Corporation |
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CXA1391Q 데이터시트(HTML) 1 Page - Sony Corporation |
1 / 33 page Description The CXA1391Q/R is a bipolar IC developed for signal processing in complementary color mosaic CCD cameras. Features • Low power consumption (170mW) • Number of delay lines used for signal processing can be selected according to the system requirements • The LPF peripheral to 1H delay line is built in Structure Bipolar silicon monolithic IC Applications Complementary color mosaic CCD cameras Absolute Maximum Ratings • Supply voltage Vcc 7 V • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation PD 690 mW (LQFP: Ta = 25°C, without P.C.B) Recommended Operating Conditions • Supply voltage Vcc 4.75 to 5.25 V • Ambient temperature Topr –20 to +75 °C – 1 – CXA1391Q/R E89Z18-ST Processing IC for Complementary Color Mosaic CCD Camera Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. CXA1391Q 64 pin QFP (Plastic) CXA1391R 64 pin LQFP (Plastic) CLP (CLP2) & MPX B G R -CB CR Y C1 Y0 Y1 CS VAP CS-Y MAX CS Y1 Y2 C0 Y0 Y0 YH1 YH0 YH0 YH1 V-APCN C0 GC GC LPF LPF LPF CLP (CLP4) 3H APCN 2H APCN LPF CLP (CLP2) CLP (CLP4) LPF r LPF WB AMP MATRIX LPF LPF WB CONTROL GC GC 16 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 GC CLP (CLP2) LPF C SLICE WB DC WB B WB G WB R C-r CONT GND 1 YL OUT CS OUT CS GAIN R – Y HUE B – Y HUE R – Y OUT B – Y OUT B – Y GAIN R – Y GAIN 31 32 17 18 19 20 21 22 23 24 25 26 27 28 29 30 LPF ABS S2 IN S1 IN CLP C YO DLY0 OUT DLY1 OUT Y1 GAIN DLY1 IN DLY2 IN Y2 GAIN GND 2 LPF ADJ 1 LPF ADJ 2 LPF ADJ 3 VCC Y-r CONT YH IN 49 50 51 52 53 54 55 56 57 58 59 60 63 64 61 62 40 39 38 37 36 35 34 33 41 42 43 44 45 46 47 48 CLP (CLP4) – – – CLP (CLP4) Block Diagram and Pin Configuration (Top View) |
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