SN74BCT2423A, SN74BCT2424A

16-BIT LATCHED MULTIPLEXER/DEMULTIPLEXER BUS TRANSCEIVERS

SDIS013 – JULY 1989 – REVISED AUGUST 1990

11

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

tsu

S1

R2

CL

(see Note A)

LOAD CIRCUIT

3.5 V

0.3 V

1.3 V

1.3 V

th

1.3 V

Timing

Input

Data

Input

Input

In-Phase

Output

Out-of-Phase

Output

tPLH

tPHL

tPHL

tPLH

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOH

VOH

VOL

VOL

1.3 V

1.3 V

1.3 V

1.3 V

tw

High-Level

Pulse

Low-Level

Input

Waveform 1

S1 Closed

(see Note B)

Waveform 2

S1 Open

(see Note B)

1.3 V

1.3 V

VOL

VOH

0.3 V

tPZL

tPZH

tPLZ

tPHZ

VOLTAGE WAVEFORMS

ENABLE AND DISABLED TIMES, 3-STATE OUTPUTS

VOLTAGE WAVEFORMS

PULSE DURATIONS

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

R1

0.3 V

7 V

3.5 V

0.3 V

3.5 V

0.3 V

3.5 V

0.3 V

3.5 V

0.3 V

3.5 V

0.3 V

From Output

Under Test

Test

Point

Output Control

(Low-level

Enabling)

RL = R1 = R2

SWITCH POSITION TABLE

TEST

S1

Open

Open

Open

tPHL

tPZH

tPZL

Closed

Open

Closed

tPHZ

tPLZ

tPLH

NOTES: A. CL includes probe and jig capacitance.

B. Wafeform 1 is for an output with internal conditions such that the output is low except when disabled by the current control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses have the following characteristics: PRR

≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.

D. The outputs are measured one at a time with one transition per measurement.

Figure 1