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CXA3010Q 데이터시트(PDF) 3 Page - Sony Corporation |
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CXA3010Q 데이터시트(HTML) 3 Page - Sony Corporation |
3 / 26 page – 3 – CXA3010Q Pin Description Pin No. Symbol Pin voltage Equivalent circuit Description 1 POWER ON — Reduced voltage detection output. This is an open collector pin that outputs a low signal when VCC is below the specified value. VCC A.GND 100k 1 2 XWD — Write data input. This pin is a Schmitt-type input that is triggered when the logical voltage goes from High to Low. VCC 1k A.GND 2.3V 2 3 RD — 4 XCI — 5 XWG — 6 XEG — 7 XS1 — 8 OTF — 9 XHD — Read data output. This pin is active when the logical voltage of the write gate signal and the erase gate signal is High. Write current control. The write current increases when the logical voltage is Low. Write gate signal input. The write system becomes active when the logical voltage is Low. Erase gate signal input. The erase system becomes active when the logical voltage is Low. Head side switching signal input. The HEAD1 system is active when the logical voltage is Low, and the HEAD0 system is active when the logical voltage is High, but only when the logical voltage for the write gate and the erase gate is High. Filter inner track/outer track mode control. Inner track mode is selected when the logical voltage is Low. Filter, time domain filter and write current 1M/2M mode control. 2M mode is selected when the logical voltage is Low. 140 VCC D.GND 3 VCC 100k 1k A.GND 2.1V 4 5 6 7 8 9 |
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