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STA369BWS 데이터시트(PDF) 4 Page - STMicroelectronics |
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STA369BWS 데이터시트(HTML) 4 Page - STMicroelectronics |
4 / 89 page Contents STA369BWS 4/89 Doc ID 16861 Rev 4 6.7.8 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.8 Variable max power correction registers (addr 0x27 - 0x28) . . . . . . . . . . 64 6.9 Distortion compensation registers (addr 0x29 - 0x2A) . . . . . . . . . . . . . . . 64 6.10 Fault detect recovery constant registers (addr 0x2B - 0x2C) . . . . . . . . . . 64 6.11 Device status register (addr 0x2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 6.12 EQ coefficients and DRC configuration register (addr 0x31) . . . . . . . . . . 66 6.13 Extended configuration register (addr 0x36) . . . . . . . . . . . . . . . . . . . . . . 67 6.13.1 Dual-band DRC (B2DRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 6.13.2 EQ DRC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 6.14 Soft volume configuration registers (addr 0x37 - 0x38) . . . . . . . . . . . . . . 70 6.15 DRC RMS filter coefficients (addr 0x39-0x3E) . . . . . . . . . . . . . . . . . . . . . 71 6.16 Extra volume resolution configuration registers (addr 0x3F) . . . . . . . . . . 72 6.17 Short-circuit protection mode registers SHOK (addr 0x46) . . . . . . . . . . . 73 6.18 Quantization error noise correction (addr 0x48) . . . . . . . . . . . . . . . . . . . . 74 6.19 Extended coefficient range up to +4/-4 (addr 0x49, 0x4A) . . . . . . . . . . . . 75 6.20 Miscellaneous registers (addr 0x4B, 0x4C) . . . . . . . . . . . . . . . . . . . . . . . 76 6.20.1 MISC1 (addr 0x4B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 6.20.2 MISC2 (addr 0x4C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 6.21 Global DRC after B2DRC (GDRC) bit (addr 0x4D, bit D0) . . . . . . . . . . . . 79 6.22 Bad PWM detection registers (addr 0x4D, 0x4E, 0x4F) . . . . . . . . . . . . . . 80 6.23 Coefficient RAM CRC protection (addr 0x60-0x6C) . . . . . . . . . . . . . . . . . 80 6.23.1 BQCHKE registers (addr 0x60 - 0x62) . . . . . . . . . . . . . . . . . . . . . . . . . 80 6.23.2 XCCHKE registers (addr 0x63 - 0x65) . . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.23.3 BQCHKR registers (addr 0x66 - 0x68) . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.23.4 XCCHKR registers (addr 0x69 - 0x6B) . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.23.5 CHKCTRL register (addr 0x6C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.23.6 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 7.1 Applications schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 7.2 PLL filter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 7.3 Typical output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 8 Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 |
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