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TS1102-100 데이터시트(PDF) 7 Page - Touchstone Semiconductor Inc

부품명 TS1102-100
상세설명  A 1關A, 200關VOS SOT23 Precision Current-Sense Amplifier
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제조업체  TOUCHSTONE [Touchstone Semiconductor Inc]
홈페이지  http://www.touchstonesemi.com
Logo TOUCHSTONE - Touchstone Semiconductor Inc

TS1102-100 데이터시트(HTML) 7 Page - Touchstone Semiconductor Inc

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TS1102
TS1102DS r1p0
Page 7
RTFDS
PIN FUNCTIONS
PIN
LABEL
FUNCTION
SOT23
5
RS+
External Sense Resistor Power-Side Connection
4
RS-
External Sense Resistor Load-Side Connection
1, 2
GND
Ground. Connect these pins to analog ground.
3
OUT
Output Voltage. VOUT is proportional to VSENSE = VRS+ - VRS-
BLOCK DIAGRAM
DESCRIPTION OF OPERATION
The internal configuration of the TS1102
– a
unidirectional high-side, current-sense amplifier - is
based on a commonly-used operational amplifier (op
amp) circuit for measuring load currents (in one
direction) in the presence of high-common-mode
voltages. In the general case, a current-sense
amplifier monitors the voltage caused by a load
current through an external sense resistor and
generates an output voltage as a function of that load
current. Referring to the typical application circuit on
Page 1, the inputs of the op-amp-based circuit are
connected across an external RSENSE resistor that
is used to measure load current. At the non-inverting
input of the TS1102 (the RS+ terminal), the applied
voltage is ILOAD x RSENSE. Since the RS- terminal is
the non-inverting input of the internal op amp, op-amp
feedback action forces the inverting input of the
internal
op
amp
to
the
same
potential
(ILOAD x RSENSE). Therefore, the voltage drop across
RSENSE (VSENSE) and the voltage drop across RGAIN
(at the RS+ terminal) are equal. To minimize any
additional error because of op-amp input bias current
mismatch, both RGAINs are the same value.
Since
the
internal
p-
channel FET’s source is
connected to the inverting input of the internal op
amp and since the voltage drop across RGAIN is the
same as the external VSENSE, op amp feedback action
drives the gate of the FET such that the FET’s drain-
source current is equal to:
S
VSE SE
R A


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