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FM25V05-GTR 데이터시트(PDF) 4 Page - Cypress Semiconductor

부품명 FM25V05-GTR
상세설명  512Kb Serial 3V F-RAM Memory
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM25V05-GTR 데이터시트(HTML) 4 Page - Cypress Semiconductor

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FM25V05 - 512Kb SPI FRAM
Rev. 3.0
Jan. 2012
Page 4 of 16
System Hookup
The SPI interface uses a total of four pins: clock,
data-in, data-out, and chip select. A typical system
configuration uses one or more FM25V05 devices
with a microcontroller that has a dedicated SPI port,
as Figure 3 illustrates. Note that the clock, data-in,
and data-out pins are common among all devices.
The Chip Select and Hold pins must be driven
separately for each FM25V05 device.
For a microcontroller that has no dedicated SPI bus, a
general purpose port may be used. To reduce
hardware resources on the controller, it is possible to
connect the two data pins together and tie off the
Hold pin. Figure 4 shows a configuration that uses
only three pins.
SPI
Microcontroller
FM25V05
Q
D
C
S
HOLD
FM25V05
Q
D
C
S
HOLD
SCK
MOSI
MISO
SS1
SS2
HOLD1
HOLD2
MOSI : Master Out Slave In
MISO : Master In Slave Out
SS : Slave Select
Figure 3. 1Mbit (128KB) System Configuration with SPI port
Microcontroller
FM25V05
Q
D
C
S
HOLD
P1.0
P1.1
P1.2
Figure 4. System Configuration without SPI port


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유사한 설명 - FM25V05-GTR

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