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AD569SD 데이터시트(PDF) 9 Page - Analog Devices |
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AD569SD 데이터시트(HTML) 9 Page - Analog Devices |
9 / 12 page AD569 REV. A –9– Figure 13. Low-Cost ±5 V Tracking Reference a. Bandwidth b. Phase Shift Figure 14. Full Power Multiplying Performance a. Time Domain b. Frequency Domain Figure 15. Multiplying Mode Performance (Input Code 0001H) MULTIPLYING PERFORMANCE Figure 14 illustrates the gain and phase characteristics of the AD569 when operated in the multiplying mode. Full-power bandwidth is shown in Figure 14a and the corresponding phase shift is shown in Figure 14b. Performance is plotted for both a full-scale input of FFFFH and an input of 8080H. An input rep- resents worst-case conditions because it places the buffer taps at the midpoints of both dividers. Figure 15 illustrates the AD569’s ability to resolve 16-bits (where 1 LSB is 96 dB below full scale) while keeping the noise floor below –130 dB with an ac reference of 1 V rms at 200 Hz. Multiplying feedthrough is due to capacitive coupling between the reference inputs and the output. As shown in Figure 16, |
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